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| 國立交通大學 |
2017-04-21T06:49:16Z |
Custom 6-R, 2-or 4-W Multi-Port Register Files in an ASIC SOC with a DVFS Window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS Technology
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Hsieh, Henry; Dhong, Sang H.; Lin, Cheng-Chung; Kuo, Ming-Zhang; Tseng, Kuo-Feng; Yang, Ping-Lin; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Recent Advances in ASIC-compatible Circuit Techniques for a SOC in Newly Emerging Application Areas: Invited Paper
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Dhong, Sang H.; Hwang, Wei |
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