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Institution Date Title Author
國立交通大學 2019-04-02T06:04:41Z A maskable memory architecture for rank-order filtering Lin, MC; Dung, LR
國立交通大學 2014-12-08T15:43:41Z A reconfigurable architecture for DSP system-on-chip Dung, LR; Lee, YL; Wu, CM
國立交通大學 2014-12-08T15:43:06Z EFBLA: A two-phase matching algorithm for fast motion estimation Cheng, HW; Dung, LR
國立交通大學 2014-12-08T15:39:41Z A vario-power ME architecture using content-based subsample algorithm Cheng, HW; Dung, LR
國立交通大學 2014-12-08T15:39:18Z A maskable memory architecture for rank-order filtering Dung, LR; Lin, MC
國立交通大學 2014-12-08T15:39:10Z EFBLA: a two-phase matching algorithm for fast motion estimation Cheng, HW; Dung, LR
國立交通大學 2014-12-08T15:39:09Z Resonator-based multi-stage Sigma Delta modulator for wideband applications with improved dynamic range Chang, TH; Dung, LR
國立交通大學 2014-12-08T15:37:16Z An IP synthesizer for limited-resource DWT processor Dung, LR
國立交通大學 2014-12-08T15:37:11Z On multiple-voltage high-level synthesis using algorithmic transformations Dung, LR; Yang, HC
國立交通大學 2014-12-08T15:35:17Z Dynamic range improvement of multistage multibit Sigma Delta modulator for low oversampling ratios Chang, TH; Dung, LR

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