|
"fan ming long"的相關文件
顯示項目 31-59 / 59 (共2頁)
1 2 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:35:18Z |
Impacts of Single Trap Induced Random Telegraph Noise on Si and Ge Nanowire FETs, 6T SRAM Cells and Logic Circuits
|
Yang, Shao-Yu; Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Analysis of Germanium FinFET Logic Circuits and SRAMs with Asymmetric Gate to Source/Drain Underlap Devices
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Source/Drain Series Resistance Induced Feedback Effect on Drain Current Mismatch and Its Implication
|
Kuo, Jack J. -Y.; Fan, Ming-Long; Lee, Wei; Su, Pin |
| 國立交通大學 |
2014-12-08T15:32:43Z |
Design and Optimization of 6T SRAM using Vertically Stacked Nanowire MOSFETs
|
Tsai, Ming-Fu; Fan, Ming-Long; Pao, Chia-Hao; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:20Z |
Comparative Leakage Analysis of GeOI FinFET and Ge Bulk FinFET
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Investigation of Single-Trap-Induced Random Telegraph Noise for Tunnel FET Based Devices, 8T SRAM Cell, and Sense Amplifiers
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:32:12Z |
Device Design and Analysis of Logic Circuits and SRAMs for Germanium FinFETs on SOI and Bulk Substrates
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:13Z |
Threshold Voltage Design of UTB SOI SRAM With Improved Stability/Variability for Ultralow Voltage Near Subthreshold Operation
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nein; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:30Z |
Threshold Voltage Design and Performance Assessment of Hetero-Channel SRAM Cells
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Design and Analysis of Robust Tunneling FET SRAM
|
Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:22Z |
Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices Using a Voronoi Approach
|
Chou, Shao-Heng; Fan, Ming-Long; Su, Pin |
| 國立交通大學 |
2014-12-08T15:30:04Z |
Variation Tolerant CLSAs for Nanoscale Bulk-CMOS and FinFET SRAM
|
Tsai, Ming-Fu; Tsai, Jen-Huan; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:03Z |
A Comprehensive Comparative Analysis of FinFET and Trigate Device, SRAM and Logic Circuits
|
Pao, Chia-Hao; Fan, Ming-Long; Tsai, Ming-Fu; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:29:40Z |
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:28:05Z |
Impacts of Random Telegraph Noise on FinFET Devices, 6T SRAM cell, and Logic Circuits
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:25:21Z |
Investigation of Static Noise Margin of FinFET SRAM Cells in Sub-threshold Region
|
Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:24:25Z |
Investigation of Static Noise Margin of Ultra-Thin-Body SOI SRAM Cells in Subthreshold Region using Analytical Solution of Poisson's Equation
|
Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:23:48Z |
"Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits"
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:23:33Z |
Independently-Controlled-Gate FinFET Schmitt Trigger Sub-Threshold SRAMs
|
Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:25Z |
Band-to-Band-Tunneling Leakage Suppression for Ultra-Thin-Body GeOI MOSFETs Using Transistor Stacking
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:20Z |
Impacts of Single Trap Induced Random Telegraph Noise on FinFET Devices and SRAM Cell Stability
|
Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:21:19Z |
Comprehensive Analysis of UTB GeOI Logic Circuits and 6T SRAM Cells considering Variability and Temperature Sensitivity
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:19:54Z |
Design and Analysis of Ultra-Thin-Body SOI Based Subthreshold SRAM
|
Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:12:04Z |
FinFET SRAM Cell Optimization Considering Temporal Variability Due to NBTI/PBTI, Surface Orientation and Various Gate Dielectrics
|
Hu, Vita Pi-Ho; Fan, Ming-Long; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:12:03Z |
Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability-A Model-Based Approach
|
Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Hsieh, Chien-Yu; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:08:46Z |
Static Noise Margin of Ultrathin-Body SOI Subthreshold SRAM Cells-An Assessment Based on Analytical Solutions of Poisson's Equation
|
Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:07:33Z |
Investigation of Switching-Time Variations for Nanoscale MOSFETs Using the Effective-Drive-Current Approach
|
Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin |
| 國立交通大學 |
2014-12-08T15:06:44Z |
Investigation of Cell Stability and Write Ability of FinFET Subthreshold SRAM Using Analytical SNM Model
|
Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
顯示項目 31-59 / 59 (共2頁)
1 2 > >>
每頁顯示[10|25|50]項目
|
