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Showing items 41-50 of 59  (6 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2014-12-08T15:30:25Z Design and Analysis of Robust Tunneling FET SRAM Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:30:22Z Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices Using a Voronoi Approach Chou, Shao-Heng; Fan, Ming-Long; Su, Pin
國立交通大學 2014-12-08T15:30:04Z Variation Tolerant CLSAs for Nanoscale Bulk-CMOS and FinFET SRAM Tsai, Ming-Fu; Tsai, Jen-Huan; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:30:03Z A Comprehensive Comparative Analysis of FinFET and Trigate Device, SRAM and Logic Circuits Pao, Chia-Hao; Fan, Ming-Long; Tsai, Ming-Fu; Chen, Yin-Nien; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:29:40Z Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:28:05Z Impacts of Random Telegraph Noise on FinFET Devices, 6T SRAM cell, and Logic Circuits Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:25:21Z Investigation of Static Noise Margin of FinFET SRAM Cells in Sub-threshold Region Fan, Ming-Long; Wu, Yu-Sheng; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:24:25Z Investigation of Static Noise Margin of Ultra-Thin-Body SOI SRAM Cells in Subthreshold Region using Analytical Solution of Poisson's Equation Hu, Vita Pi-Ho; Wu, Yu-Sheng; Fan, Ming-Long; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:23:48Z "Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits" Fan, Ming-Long; Hu, Vita Pi-Ho; Chen, Yin-Nien; Su, Pin; Chuang, Ching-Te
國立交通大學 2014-12-08T15:23:33Z Independently-Controlled-Gate FinFET Schmitt Trigger Sub-Threshold SRAMs Hsieh, Chien-Yu; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te

Showing items 41-50 of 59  (6 Page(s) Totally)
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