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Showing items 1-7 of 7 (1 Page(s) Totally)
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| 國立臺灣海洋大學 |
2016-06 |
Layer-aware 3D-IC partitioning for area-overhead reduction considering the power of interconnections and pads
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Lai, Yung-Hao; Chang, Yang-Lang; Fang, Jyh-Perng; Chang, Lena; Kobayashi, Hirokazu |
| 臺大學術典藏 |
2007-04-19T04:27:04Z |
Tile-graph-based power planning
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Fang, Jyh-Perng;Chen, Sao-Jie; Fang, Jyh-Perng; Chen, Sao-Jie |
| 國立臺灣大學 |
2006 |
An Enhanced BSA for Floorplanning
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Fang, Jyh Perng; Tong, Yang-Shan; Chen, Sao Jie |
| 國立臺灣大學 |
2004 |
Simultaneous Routing, Buffering, and Power Planning in Floorplan Design
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方志鵬; Fang, Jyh-Perng |
| 國立臺灣大學 |
2003-10 |
Simultaneous routing and buffering in floorplan design
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Fang, Jyh Perng; Tong, Yang-Shan; Chen, Sao Jie |
| 國立臺灣大學 |
2003-09 |
Tile-based power planning during floorplanning
|
Fang, Jyh Perng; Chen, Sao Jie |
| 國立臺灣大學 |
2003-05 |
Tile-graph-based power planning
|
Fang, Jyh-Perng; Chen, Sao-Jie |
Showing items 1-7 of 7 (1 Page(s) Totally)
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