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"fang wai chi"的相關文件
顯示項目 116-125 / 169 (共17頁)
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| 國立交通大學 |
2014-12-12T01:27:13Z |
高編碼率之 CP-PEG LDPC 解碼器設計與實做
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林高守; Lin, Kao-Shou; 張錫嘉; 方偉騏; Chang, Hsie-Chia; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:48:38Z |
Techniques and applications of intelligent multimedia data hiding
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Huang, Hsiang-Cheh; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:41:19Z |
A 11.5-Gbps LDPC Decoder Based on CP-PEG Code Construction
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Chen, Chih-Lung; Lin, Kao-Shou; Chang, Hsie-Chia; Fang, Wai-Chi; Lee, Chen-Yi |
| 國立交通大學 |
2014-12-08T15:41:09Z |
A High-Troughput Radix-4 Log-MAP Decoder With Low Complexity LLR Architecture
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Chuang, Hsiang-Tsung; Tseng, Kai-Hsin; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:41:08Z |
An Area-Efficient Parallel Turbo Decoder Based on Contention Free Algorithm
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Tseng, Kai-Hsin; Chuang, Hsiang-Tsung; Tseng, Shao-Yen; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:37:35Z |
A Data Detection Scheme for Single-Carrier Block Transmission Using Sphere Decoding Algorithm
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Lin, Ying-Tsung; Kuo, Chia-Hsun; Chen, Sau-Gee; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:37:28Z |
Mixed Bio-Signal Lossless Data Compressor for Portable Brain-Heart Monitoring Systems
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Chua, Ericson; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:36:46Z |
A Pipeline VLSI Design of Fast Singular Value Decomposition Processor for Real-time EEG System Based on On-line Recursive Independent Component Analysis
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Huang, Kuan-Ju; Shih, Wei-Yeh; Chang, Jui Chung; Feng, Chih Wei; Fang, Wai-Chi |
| 國立交通大學 |
2014-12-08T15:36:46Z |
An Efficient VLSI Implementation of On-line Recursive ICA Processor for Real-time Multi-channel EEG Signal Separation
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Shih, Wei-Yeh; Liao, Jui-Chieh; Huang, Kuan-Ju; Fang, Wai-Chi; Cauwenberghs, Gert; Jung, Tzyy-Ping |
| 國立交通大學 |
2014-12-08T15:35:47Z |
A Novel Near-Infrared Array Based Arterial Pulse Wave Measurement Method
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Huang, Wei-Chin; Hou, Hsiang-Wen; Cheng, Ching-Ju; Wu, Shih-Yang; Chen, Tien-Ho; Fang, Wai-Chi |
顯示項目 116-125 / 169 (共17頁)
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