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"fang yean kuen"的相关文件
显示项目 51-60 / 182 (共19页)
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| 國立成功大學 |
2008-04-30 |
Observations in trapping characteristics of positive bias temperature instability on high-k/metal gate n-type metal oxide semiconductor field effect transistor with the complementary multi-pulse technique
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Liao, J. C.; Fang, Yean-Kuen; Hou, Y. T.; Wu, W. H.; Hung, C. L.; Hsu, P. F.; Lin, K. C.; Huang, K. T.; Lee, T. L.; Liang, M. S. |
| 國立成功大學 |
2008-04 |
Observation of reliability of HfZrOX gate dielectric devices with different Zr/Hf ratios
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Liao, Jing-Chyi; Fang, Yean-Kuen; Hou, Yong Tian; Tseng, Wei Hsiung; Yang, Chih I.; Hsu, Peng Fu; Chao, Yuen Shun; Lin, Kang Cheng; Huang, Kuo Tai; Lee, Tzu Liang; Liang, Meng Sung |
| 國立成功大學 |
2008-04 |
Effect of etch stop layer stress on negative bias temperature instability of deep submicron p-type metal-oxide-semiconductor field effect transistors with dual gate oxide
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Chen, Ming-Shing; Fang, Yean-Kuen; Lee, Tung-Hsing; Lin, Chien-Ting; Chiang, Yen-Ting; Ko, Joe; Sheu, Yau Kae; Shen, Tsong Lin; Liao, Wen Yi |
| 國立成功大學 |
2008-03-31 |
Impact of the strained SiGe source/drain on hot carrier reliability for 45 nm p-type metal-oxide-semiconductor field-effect transistors
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Cheng, C. Y.; Fang, Yean-Kuen; Hsieh, J. C.; Hsia, H.; Chen, W. M.; Lin, S. S.; Hou, C. S. |
| 國立成功大學 |
2008-02-21 |
Mechanism and modelling of source/drain asymmetry variation in 65nm CMOS devices for SRAM and logic applications
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Lee, Tung-Hsing; Fang, Yean-Kuen; Chiang, Yen-Ting; Lin, C. T.; Chen, Ming-Shing; Cheng, Osbert |
| 國立成功大學 |
2008-02 |
Observation of room temperature negative differential resistance (NDR) in organic light-emitting diode with inorganic dopant
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Fang, Yean-Kuen; Chiang, Yen-Ting; Chen, Shih-Fang; Lin, Chun-Yu; Hou, Shul-Ching; Hung, Chih-Sheng; Tsai, Tzong-Yow; Chang, Shiuan-Ho; Chou, Tse-Heng |
| 國立成功大學 |
2008-02 |
A novel electrochromic device with high optical switching speed
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Fang, Yean-Kuen; Chou, Tse-Heng; Lin, Chun-Yu; Chiang, Yen-Ting; Chen, Shih-Fang; Yang, Che-Yun; Chang, Shiuan-Ho; Lin, Chun-Sheng |
| 國立高雄大學 |
2008 |
A high current gain gate-controlled lateral bipolar junction transistor with 90 nm CMOS technology for future RF SoC applications
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Chen, Shuo-Mao; Fang, Yean-Kuen; Yeh, Wen-Kuan; Lee, I.C.; Chiang, Yen-Ting |
| 國立成功大學 |
2007-10 |
A novel STI etching technology to mitigate an inverse narrow width effect, and improve device performances for 90 nm node and beyond CMOS technology
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Chiu, Hua-Yueh; Fang, Yean-Kuen; Chou, T. H.; Chiang, Yen-Ting; Lin, C. I. |
| 國立成功大學 |
2007-09 |
CMOS dual-work-function engineering by using implanted Ni-FUSI
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Lin, Chien-Ting; Ramin, Manfred; Pas, Michael; Wise, Rick; Fang, Yean-Kuen; Hsu, Che-Hua; Huang, Yao-Tsung; Cheng, Li-Wei; Ma, Mike |
显示项目 51-60 / 182 (共19页)
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