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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2018-09-10T04:59:30Z Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-like Data-Structures F. Wang.; FARN WANG
臺大學術典藏 2018-09-10T04:59:30Z Model-Checking Distributed Real-Time Systems with States, Events, and Multiple Fairness Assumptions F. Wang.; FARN WANG
臺大學術典藏 2018-09-10T04:59:29Z Formal Verification of Timed Systems: A Survey and Perspective Falk, H.F. Wang.; Falk, H.; FARN WANG
臺大學術典藏 2018-09-10T04:35:39Z Timing Parameter Characterization of Real-Time Systems F. Wang; H.-C. Yen.; FARN WANG
臺大學術典藏 2018-09-10T04:35:39Z Numerical Coverage Estimation for the Symbolic Simulation of Real-Time Systems F. Wang; G.-D. Huang; F. Yu.; FARN WANG
臺大學術典藏 2018-09-10T04:35:38Z Efficient Data Structure for Fully Symbolic Verification of Real-Time Software Systems F. Wang; FARN WANG
臺大學術典藏 2018-09-10T04:35:38Z Symbolic Simulation of Real-Time Concurrent Systems F. Wang; G.-D. Hwang; F. Yu; FARN WANG
臺大學術典藏 2018-09-10T04:35:38Z Verification of Embedded Systems with BDD-like Data-Structures F. Wang; FARN WANG
臺大學術典藏 2018-09-10T04:35:38Z TCTL Inevitability Analysis of Dense-Time Systems F. Wang; G.-D. Hwang; F. Yu; FARN WANG
臺大學術典藏 2018-09-10T04:35:37Z Real-Time Distributed System Specification and Verification in APTL F. Wang;A.K. Mok;E.A. Emerson; F. Wang; A.K. Mok; E.A. Emerson; FARN WANG
臺大學術典藏 2018-09-10T04:35:37Z Efficient Verification of Timed Automata with BDD-like Data-Structures F. Wang,; FARN WANG
臺大學術典藏 2018-09-10T04:15:26Z Efficient and User-Friendly Verification. F. Wang; P.-A. Hsiung; FARN WANG
臺大學術典藏 2018-09-10T04:15:26Z Symmetric Model-Checking of Concurrent Timed Automata with Clock-Restriction Diagram F. Wang; FARN WANG
臺大學術典藏 2018-09-10T04:15:26Z Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures F. Wang; K. Schmidt; FARN WANG
臺大學術典藏 2018-09-10T03:50:34Z Parametric Optimization of Open Real-Time Systems F. Wang; H.-C. Yen; FARN WANG
臺大學術典藏 2018-09-10T03:50:34Z RED: Model-Checker for Timed Automata with Clock-Restriction Diagram F. Wang; FARN WANG
臺大學術典藏 2018-09-10T03:50:34Z Symbolic Verification of Complex Real-Time Systems with Clock-Restriction Diagram F. Wang; FARN WANG
臺大學術典藏 2015 Model-checking fair dense-time systems with propositions and events Wang, F.; Wang, F.; FARN WANG

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