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"fei pei lai"
Showing items 296-305 of 347 (35 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T04:15:44Z |
Paged Cache: An Efficient Partition Architecture for Reducing Power
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Chang, Yen-Jen;Lai, Feipei; Chang, Yen-Jen; Lai, Feipei; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:44Z |
Analysis and Design of Routing Based Hierarchical Internet Cache Protocol Architecture
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Kuo-Chang Ting,; Feipei Lai,; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:44Z |
Improve Web Proxy Performance by Alleviating Disk I/O Overhead
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Yen-Jen Chang, Feipei Lai; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:44Z |
Performance Issues in Squid
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Mao-yu Jan; Yung-ching Weng; Feipei Lai; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:44Z |
Energy Analysis of Bipartition Architecture for Pipelined Circuits
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Ruan, Shanq-Jang;Naroska, Edwin;Chang, Yen-Ren;Ho, Chia-Lin;Lai, Feipei; Ruan, Shanq-Jang; Naroska, Edwin; Chang, Yen-Ren; Ho, Chia-Lin; Lai, Feipei; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:43Z |
Sentry Tag: An Efficient Filter Scheme for Low Power Cache
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Yen-Jen Chang; Feipei Lai; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:43Z |
An Efficient Two-Level Filter Scheme for Low Power Cache
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Yen-Jen Chang; Feipei Lai; Shanq-Jang Ruan; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:43Z |
Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits
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Ruan, Shanq-Jang; Ho, Chia-Lin; Naroska, Edwin; Lai, Feipei; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:43Z |
A Performance Report of a Fast TTS Implementation
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Wen-jiun Huang,; Yuh-hua Hu,; Feipei Lai,; Chun-Yen Chou,; FEI-PEI LAI |
| 臺大學術典藏 |
2018-09-10T04:15:42Z |
ENPCO: An Entropy-Based Partition-Codec Algorithm to Reduce Power for bipartition-codec architecture in Pipelined Circuits
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Shanq-Jang Ruan,; Edwin Naroska,; Yen-Ren Chang,; Feipei Lai,; Uwe Schwiegelshohn; FEI-PEI LAI |
Showing items 296-305 of 347 (35 Page(s) Totally)
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