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Showing items 51-60 of 347  (35 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2020-04-16T02:35:12Z Region-based template deformation and masking for eye-feature extraction and description Deng, J.-Y.; Lai, F.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:12Z Hybrid parallel circuit simulation approaches Naroska, E.; Shang, R.-J.; Lai, F.; Schwiegelshohn, U.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:12Z Messagfer om the organizers FEI-PEI LAI; Hsu, C.-C.; Horiguchi, S.; Chang, J-F.; Maggs, B.; Lai, F.; Hsu, D.F.; Wu, J.S.
臺大學術典藏 2020-04-16T02:35:11Z Zero-aware asymmetric SRAM cell for reducing cache power in writing zero Chang, Y.-J.; Lai, F.; Yang, C.-L.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:11Z Power analysis of bipartition and dual-encoding architecture for pipelined circuits Ho, C.-L.; Lai, F.; FEI-PEI LAI; Naroska, E.; Ruan, S.-J.
臺大學術典藏 2020-04-16T02:35:11Z Multimedia ASIP SoC codesign based on multicriteria optimization Jeng, I.-H.; Lai, F.; Naroska, E.; Schwiegelshohn, U.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:11Z An effective output-oriented algorithm for low power multipartition architecture Ruan, S.-J.; Lin, J.-C.; Chen, P.-H.; Lai, F.; Tsai, K.-L.; Yu, C.-W.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:10Z Value-conscious cache: Simple technique for reducing cache access power Chang, Y.-J.; Yang, C.-L.; Lai, F.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:10Z Adaptive filtering of evoked potentials using higher-order adaptive signal enhancer with genetic-type variable step-size prefilter Lin, B.-S.; Chong, F.-C.; Lai, F.; FEI-PEI LAI
臺大學術典藏 2020-04-16T02:35:09Z GDCF: Grouping DCF for the MAC layer enhancement of 802.11 Ting, K.-C.; Jan, M.-Y.; Hsieh, S.-H.; Lee, H.-H.; Lai, F.; FEI-PEI LAI

Showing items 51-60 of 347  (35 Page(s) Totally)
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