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Taiwan Academic Institutional Repository >
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"fei pei lai"
Showing items 41-50 of 347 (35 Page(s) Totally)
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| 臺大學術典藏 |
2020-04-16T02:35:15Z |
A memory management unit and cache controller for the MARS system
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Lai, F.;Wu, C.-Y.;Parng, T.-M.; Lai, F.; Wu, C.-Y.; Parng, T.-M.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:15Z |
Optimization on instruction reorganization
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Lai, F.;Lee, H.-C.;Lee, C.-L.; Lai, F.; Lee, H.-C.; Lee, C.-L.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:14Z |
A superscalar micro-architecture supporting aggressive instruction scheduling
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Chang, M.-C.;Lai, F.; Chang, M.-C.; Lai, F.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:14Z |
The complementary relationship of interprocedural register allocation and inlining
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Lai, F.;Chao, Y.-k.;Hsieh, C.-J.; Lai, F.; Chao, Y.-k.; Hsieh, C.-J.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:13Z |
Efficient exploitation of instruction-level parallelism for superscalar processors by the conjugate register file scheme
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Chang, M.-C.; Lai, F.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:13Z |
Image Shading Taking into Account Relativistic Effects
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Chang, M.-C.; Lai, F.; Chen, W.-C.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:13Z |
Intelligent code migration technique for synchronisation operations on a multiprocessor
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Hwang, R.-Y.;Lai, F.; Hwang, R.-Y.; Lai, F.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:13Z |
Guiding instruction scheduling with synchronization markers on a superscalar based multiprocessor
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Hwang, R.-Y.; Lai, F.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:12Z |
Performance analysis of broadcast in mobile ad hoc networks with synchronized and non-synchronized reception
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Pan, K.-H.; Wu, H.-K.; Shang, R.-J.; Lai, F.; FEI-PEI LAI |
| 臺大學術典藏 |
2020-04-16T02:35:12Z |
Requirements specification and analysis of digital systems using fuzzy and marked Petri nets
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Shen, V.R.L.; Lai, F.; FEI-PEI LAI |
Showing items 41-50 of 347 (35 Page(s) Totally)
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