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"feng w s"
Showing items 11-22 of 22 (1 Page(s) Totally)
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| 國立臺灣師範大學 |
2014-10-30T09:32:06Z |
Constrained via minimization for three-layer routing
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Chang, K. E.; Jyu, H. F.; Feng, W. S. |
| 國立臺灣師範大學 |
2014-10-30T09:32:06Z |
有關VLSI佈局層指定的圖形縮減問題
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張國恩; 鞠鴻飛; 馮武雄; Chang, K. E.; Jyu, H. F.; Feng, W. S. |
| 國立臺灣大學 |
1997-07 |
Economic UPS structure with phase-controlled battery charger and input-power-factor improvement
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Ho, W.-J.; Lio, J.-B.; Feng, W.-S. |
| 國立臺灣大學 |
1997-06 |
Improvement in radiation-hard CMOS logic gates for noise margin
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Yih, S.-J.; Chang, M.-L.; Hwu, J.-G.; Feng, W.-S. |
| 國立臺灣大學 |
1996-08 |
Single-switch soft-switching flyback converter
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Lio, J.-B.; Lin, M.-S.; Chen, D.Y.; Feng, W.-S. |
| 國立臺灣大學 |
1996 |
Synchronous dimming control for a cold-cathode fluorescent lampdriver
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Lin, M.-S.; Lee, M.-C.; Chen, D.Y.; Feng, W.-S. |
| 國立臺灣大學 |
1993-10 |
Computer-aided design on the VLSI 45°-mask compaction
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Feng, W.S.; Yang, W.T.; Hsieh, M.Y. |
| 國立臺灣大學 |
1993-07 |
Binary-tree timing simulation with consideration of internal charges
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Wang, J.J.H.; Chang, M.; Feng, W.S. |
| 國立臺灣大學 |
1992-07 |
Simple analytical model for short-channel MOS devices
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Chow, H.-C.; Feng, W.-S.; Kuo, J.B. |
| 國立臺灣大學 |
1992-06 |
Model for propagation delay evaluation of CMOS inverter including input slope effects for timing verification
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Chow, H.C.; Feng, W.-S. |
| 國立臺灣大學 |
1992-02 |
Analytical delay model of CMOS inverter including channel-length modulation
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Chow, H.-C.; Feng, W.-S. |
| 國立臺灣大學 |
1990-07 |
A 'delayed layering' three layer channel routing
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Chang, K.E.; Feng, W.S. |
Showing items 11-22 of 22 (1 Page(s) Totally)
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