| 國立臺灣大學 |
1995-02 |
A Current Waveform Simulator Using Charge-Bsed Current Model
|
馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung; Wang, J. H.; Fan, J. T. |
| 國立臺灣大學 |
1995 |
A New Delay Model with the Considerations of Internal Charges
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1995 |
New Efficient Designs for XOR and XNOT Functions on Transistor Level
|
Wang, J. M.; Fan, S. C.; 馮武雄; Wang, J. M.; Fan, S. C.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994-06 |
Transient Sensitivity Computation of MOSFEET Circuits Using Iterated Timing Analysis and Selective-tracing Waveform Relaxation
|
Chen, C. J.; 馮武雄; Chen, C. J.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994-05 |
An H-V Alternating Router
|
Tsai, C. C.; 陳少傑; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994-03 |
An accurate time-domain current waveform simulator for VLSI circuits
|
Wang, Jyh-Herng; Fan, Jen-Teng; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994-02 |
An Accurate Time-Domain Current Waveform Simulator for VLSI Circuits
|
Wang, J. H.; Chang, M. L.; 馮武雄; Wang, J. H.; Chang, M. L.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994 |
Charge-Based Current Model for CMOS Gates
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digital Circuit Si[20642:0:4] 50300022:31:An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digit
|
Chow, H. C.; 馮武雄; Kuo, J. B.; Chow, H. C.; Feng, Wu-Shiung; Kuo, J. B. |
| 國立臺灣大學 |
1993 |
BTS-Binary-Tree Timing Simulator with the Considerations of Internal Charges
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
Accurate Current Model for CMOS Gates
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
Computer-Aided Design on the VLSI 45-Degree Mask Compaction
|
馮武雄; 楊維楨; Hsieh, M. Y.; Feng, Wu-Shiung; Yang, Wei-Tzen; Hsieh, M. Y. |
| 國立臺灣大學 |
1993 |
WBCS - An Accurate and Tableless Current Simulator for CMOS Gates
|
Fan, J. T.; Wang, J. H.; 馮武雄; Fan, J. T.; Wang, J. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-12 |
Delay Calculation by Using Novel Logical Expression
|
Wang, J. H.; Chang, M.; 馮武雄; Wang, J. H.; Chang, M.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-09 |
An Improved Analytical Model for Short-Channel MOSFET's
|
Chow, H. C.; 馮武雄; Chow, H. C.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-08 |
New Interactive Construction Approach to Routing with Compacted Area
|
Tsai, C. C.; 陳少傑; Hsiao, P. Y.; 馮武雄; Tsai, C. C.; Chen, Sao-Jie; Hsiao, P. Y.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-06 |
A new efficient approach to multilayer channel routing problem
|
Fang, Sung-Chuan; Feng, Wu-Shiung; Lee, Shian-Lang |
| 國立臺灣大學 |
1992-06 |
A New Efficient Approach to Multilayer Channel Routing Problem
|
Fang, S. C.; 馮武雄; Lee, S. L.; Fang, S. C.; Feng, Wu-Shiung; Lee, S. L. |
| 國立臺灣大學 |
1992-05 |
A novel current model for CMOS gates
|
Wang, Jyh Herng; Fan, Jeng Ten; Feng, Wu Shiung |
| 國立臺灣大學 |
1992 |
An Analytical CMOS Inverter Delay Model Including Channel-Length Modulations
|
Chow, H. C.; 馮武雄; Chow, H. C.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992 |
Channel Routing Using Neural Networking
|
Shih, P. H.; 馮武雄; Shih, P. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992 |
A Novel Current Model for CMOS Gates
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992 |
A Recursive Algorithm for Computing Delays in RC Networks with Internal Charges
|
Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992 |
A Short-Channel CMOS Inverter Propagation Delay Model Suitable for Timing Verification
|
Chow, H. C.; 馮武雄; Chow, H. C.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992 |
Considerations of Internal Charges on Computing Delay
|
Wang, J. H.; Chang, M.; 馮武雄; Wang, J. H.; Chang, M.; Feng, Wu-Shiung |
