臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 6-15 of 190 (19 Page(s) Totally)
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Institution	Date	Title	Author
國立臺灣師範大學	2014-10-30T09:32:14Z	An efficient layer assignment for three-layer VLSI routing	張國恩; 馮武雄; Fang, S. C.; Chang, Kuo-En; Feng Wu-Shiung; Fang, Sung-Chuan
國立臺灣師範大學	2014-10-30T09:32:14Z	Via minimization with associated constraints in three-layer routing problem	Fang, Sung-Chuan; Chang, Kuo-En; Feng, Wu-Shiung
國立臺灣師範大學	2014-10-30T09:32:14Z	A new hybrid sense algorithm for three-layer via minimization with practical constraints	Fang, Sung-Chuan; Chang, Kuo-En; Feng, Wu-Shiung
國立臺灣師範大學	2014-10-30T09:32:14Z	Constrained via minimization with practical considerations for multi-layer VLSI/PCB routing problems	Fang, Sung-Chuan; Chang, Kuo-En; Feng, Wu-Shiung; Chen, Sao-Jie
國立臺灣師範大學	2014-10-30T09:32:14Z	A new hybrid sense algorithm for three-layer via minimization with practical constraints	Fang, Sung-Chuan; Chang, Kuo-En; Feng, Wu-Shiung
國立臺灣師範大學	2014-10-30T09:32:14Z	The pin alignment in VLSI routing with movable terminals	張國恩; 馮武雄; Yu, H. J.; Chang, Kuo-En; Feng Wu-Shiung
國立臺灣師範大學	2014-10-30T09:32:14Z	The pin alignment in VLSI routing with movable terminals	張國恩; 馮武雄; Yu, H. J.; Chang, Kuo-En; Feng Wu-Shiung; Yu, H. J.
國立臺灣師範大學	2014-10-30T09:32:07Z	Maximizing pin alignment in VLSI routing	張國恩; 馮武雄; Chang, Kuo-En; Feng, Wu-Shiung
臺大學術典藏	2009-02-04T18:28:54Z	Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems	Feng, Wu-Shiung;Chang, K. E.;馮武雄;Chang, K. E.;Fang, S. C.;Chen, Sao-Jie;陳少傑; Fang, S. C.; Chang, K. E.; 馮武雄; 陳少傑; Chang, K. E.; Feng, Wu-Shiung; Chen, Sao-Jie
國立臺灣大學	2006-02	XNOR-Based Double-Edge-Triggered Flip-Flop for Two-Phase Pipelines	Shu, Ying-Haw; Tenqchen, Shing; Sun, Ming-Chang; Feng, Wu-Shiung

Showing items 6-15 of 190 (19 Page(s) Totally)
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