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Taiwan Academic Institutional Repository >
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"feng wu shiung"
Showing items 51-60 of 190 (19 Page(s) Totally) << < 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page
| 國立臺灣大學 |
1994-03 |
An accurate time-domain current waveform simulator for VLSI circuits
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Wang, Jyh-Herng; Fan, Jen-Teng; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994-02 |
An Accurate Time-Domain Current Waveform Simulator for VLSI Circuits
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Wang, J. H.; Chang, M. L.; 馮武雄; Wang, J. H.; Chang, M. L.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1994 |
Charge-Based Current Model for CMOS Gates
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Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digital Circuit Si[20642:0:4] 50300022:31:An Improved Analytical Short-Channel MOSFET Model Valid in All Regions of Operation for Analog/Digit
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Chow, H. C.; 馮武雄; Kuo, J. B.; Chow, H. C.; Feng, Wu-Shiung; Kuo, J. B. |
| 國立臺灣大學 |
1993 |
BTS-Binary-Tree Timing Simulator with the Considerations of Internal Charges
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Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
Accurate Current Model for CMOS Gates
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Wang, J. H.; Fan, J. T.; 馮武雄; Wang, J. H.; Fan, J. T.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1993 |
Computer-Aided Design on the VLSI 45-Degree Mask Compaction
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馮武雄; 楊維楨; Hsieh, M. Y.; Feng, Wu-Shiung; Yang, Wei-Tzen; Hsieh, M. Y. |
| 國立臺灣大學 |
1993 |
WBCS - An Accurate and Tableless Current Simulator for CMOS Gates
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Fan, J. T.; Wang, J. H.; 馮武雄; Fan, J. T.; Wang, J. H.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-12 |
Delay Calculation by Using Novel Logical Expression
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Wang, J. H.; Chang, M.; 馮武雄; Wang, J. H.; Chang, M.; Feng, Wu-Shiung |
| 國立臺灣大學 |
1992-09 |
An Improved Analytical Model for Short-Channel MOSFET's
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Chow, H. C.; 馮武雄; Chow, H. C.; Feng, Wu-Shiung |
Showing items 51-60 of 190 (19 Page(s) Totally) << < 1 2 3 4 5 6 7 8 9 10 > >> View [10|25|50] records per page
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