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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2021-04-21T23:30:05Z Translating traditional SIMD instructions to vector length agnostic architectures Fu, Sheng Yu; Hsu, Wei Chung
臺大學術典藏 2020-05-04T08:08:37Z SIMD Code Translation in an Enhanced HQEMU. Fu, Sheng-Yu; Hong, Ding-Yong; Wu, Jan-Jan; Liu, Pangfeng; Hsu, Wei-Chung; WEI-CHUNG HSU; Fu, Sheng-Yu;Hong, Ding-Yong;Wu, Jan-Jan;Liu, Pangfeng;Hsu, Wei-Chung
臺大學術典藏 2020-05-04T08:08:36Z Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems. Peng, Kuo-You;Fu, Sheng-Yu;Liu, Yu-Ping;Hsu, Wei-Chung; Peng, Kuo-You; Fu, Sheng-Yu; Liu, Yu-Ping; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:36Z Exploiting Longer SIMD Lanes in Dynamic Binary Translation. Hong, Ding-Yong; Fu, Sheng-Yu; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:35Z Automatically Migrating Sequential Applications to Heterogeneous System Architecture. Liang, Chih-Yung;Fu, Sheng-Yu;Liu, Yu-Ping;Hsu, Wei-Chung; Liang, Chih-Yung; Fu, Sheng-Yu; Liu, Yu-Ping; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:35Z Dynamic tuning of applications using restricted transactional memory. Lin, Shih-Kai; Hong, Ding-Yong; Fu, Sheng-Yu; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:35Z Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation. WEI-CHUNG HSU; Liu, Yu-Ping; Hong, Ding-Yong; Wu, Jan-Jan; Fu, Sheng-Yu; Hsu, Wei-Chung
臺大學術典藏 2020-05-04T08:08:35Z Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions. Fu, Sheng-Yu; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:35Z Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator. Fu, Sheng-Yu; Lin, Chih-Min; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU
臺大學術典藏 2020-05-04T08:08:34Z Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures. Fu, Sheng-Yu;Hsu, Wei-Chung; Fu, Sheng-Yu; Hsu, Wei-Chung; WEI-CHUNG HSU

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