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50712260
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356
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"guo ji"的相關文件
顯示項目 1-12 / 12 (共1頁) 1 每頁顯示[10|25|50]項目
| 國立交通大學 |
2019-04-02T06:04:36Z |
A NOVEL VLSI ARRAY DESIGN FOR THE DISCRETE HARTLEY TRANSFORM USING CYCLIC CONVOLUTION
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GUO, JI; LIU, CM; JEN, CW |
| 國立臺灣大學 |
2015 |
基於局部線性嵌入和支持向量機的藻類識別
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郭驥; Guo, Ji |
| 國立交通大學 |
2014-12-08T15:44:50Z |
Hardware-efficient DFT designs with cyclic convolution and subexpression sharing
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Chang, TS; Guo, JI; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:12Z |
Fast perceptual convolution for room reverberation
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Lee, WC; Liu, CM; Yang, CH; Guo, JI |
| 國立交通大學 |
2014-12-08T15:26:04Z |
A memory efficient realization of cyclic convolution and its application to discrete cosine transform
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Chen, HC; Guo, JI; Jen, CW |
| 國立交通大學 |
2014-12-08T15:19:40Z |
A memory-efficient realization of cyclic convolution and its application to discrete cosine transform
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Chen, HC; Guo, JI; Chang, TS; Jen, CW |
| 國立交通大學 |
2014-12-08T15:19:15Z |
The long length DHT design with a new hardware efficient distributed arithmetic approach and cyclic preserving partitioning
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Chen, HC; Chang, TS; Guo, JI; Jen, CW |
| 國立交通大學 |
2014-12-08T15:18:00Z |
Distributed arithmetic realisation of cyclic convolution and its DFT application
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Chen, HC; Guo, JI; Jen, CW; Chang, TS |
| 國立交通大學 |
2014-12-08T15:04:46Z |
THE EFFICIENT MEMORY-BASED VLSI ARRAY DESIGNS FOR DFT AND DCT
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GUO, JI; LIU, CM; JEN, CW |
| 國立交通大學 |
2014-12-08T15:04:40Z |
A NEW ARRAY ARCHITECTURE FOR PRIME-LENGTH DISCRETE COSINE TRANSFORM
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GUO, JI; LIU, CM; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:25Z |
A NOVEL CORDIC-BASED ARRAY ARCHITECTURE FOR THE MULTIDIMENSIONAL DISCRETE HARTLEY TRANSFORM
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GUO, JI; LIU, CM; JEN, CW |
| 國立交通大學 |
2014-12-08T15:03:08Z |
UNIFIED ARRAY ARCHITECTURE FOR DISCRETE COSINE TRANSFORM, SINE TRANSFORM AND THEIR INVERSES
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GUO, JI; CHEN, CS; JEN, CW |
顯示項目 1-12 / 12 (共1頁) 1 每頁顯示[10|25|50]項目
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