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Showing items 11-18 of 18 (1 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Escape routing for staggered-pin-array PCBs
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Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG; Ho, Y.-K.; Ho, Y.-K.;Lee, H.-C.;Chang, Y.-W. |
| 臺大學術典藏 |
2018-09-10T09:48:07Z |
Layer minimization in escape routing for staggered-pin-array PCBs
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Ho, Y.-K.;Shih, X.-W.;Chang, Y.-W.;Cheng, C.-K.; Ho, Y.-K.; Shih, X.-W.; Chang, Y.-W.; Cheng, C.-K.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:07Z |
Multiple chip planning for chip-interposer codesign
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Ho, Y.-K.;Chang, Y.-W.; Ho, Y.-K.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:22:25Z |
Obstacle-avoiding free-assignment routing for flip-chip designs
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Lee, P.-W.; Lee, H.-C.; Ho, Y.-K.; Chang, Y.-W.; Chang, C.-F.; Lin, I.-J.; Shen, C.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:42:38Z |
Escape routing for staggered-pin-array PCBs
|
Ho, Y.-K.;Lee, H.-C.;Chang, Y.-W.; Ho, Y.-K.; Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:14:58Z |
Blockage-avoiding buffered clock-tree synthesis for clock latency-range and skew minimization
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Shih, X.-W.; Cheng, C.-C.; Ho, Y.-K.; Chang, Y.-W.; Shih, X.-W.; Cheng, C.-C.; Ho, Y.-K.; Chang, Y.-W.; YAO-WEN CHANG |
| 淡江大學 |
2013-10 |
Characterization of gasochromic vanadium oxides films by X-ray absorption spectroscopy
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Ho, Y.K.; Chang, C.C.; Wei, D.H.; Dong, C.L.; Chen, C.L.; Chen, J.L.; Jang, W.L.; Hsu, C.C.; Chan, T.S.; Kumar, Krishna; Chang, C.L.; Wu, M.K. |
| 臺大學術典藏 |
2010 |
Invasive Infections of Aggregatibacter (Actinobacillus) Actinomycetemcomitans
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Wang C.-Y.; Wang H.-C.; Li J.-M.; Wang J.-Y.; Yang K.-C.; Ho Y.-K.; Lin P.-Y.; Lee L.-N.; Yu C.-J.; Yang P.-C.; PO-REN HSUEH; PO-REN HSUEH;Yang P.-C.;Yu C.-J.;Lee L.-N.;Lin P.-Y.;Ho Y.-K.;Yang K.-C.;Wang J.-Y.;Li J.-M.;Wang H.-C.;Wang C.-Y. |
Showing items 11-18 of 18 (1 Page(s) Totally)
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