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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Showing items 11-19 of 19  (1 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2015-11-26T01:07:06Z 應用於近臨界電壓晶片資料傳輸之拔靴帶式電路技術 何盈杰; Ho, Yingchieh; 蘇朝琴; Su, Chauchin
國立交通大學 2014-12-08T15:36:41Z Field-programmable lab-on-a-chip based on microelectrode dot array architecture Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi
國立交通大學 2014-12-08T15:36:16Z Energy-Effective Sub-Threshold Interconnect Design Using High-Boosting Predrivers Ho, Yingchieh; Chen, Hung-Kai; Su, Chauchin
國立交通大學 2014-12-08T15:35:53Z A 48.6-to-105.2 mu W Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications Hsu, Shu-Yu; Ho, Yingchieh; Chang, Po-Yao; Su, Chauchin; Lee, Chen-Yi
國立交通大學 2014-12-08T15:32:53Z A Near-Threshold 480 MHz 78 mu W All-Digital PLL With a Bootstrapped DCO Ho, Yingchieh; Yang, Yu-Sheng; Chang, ChiaChi; Su, Chauchin
國立交通大學 2014-12-08T15:29:01Z A 0.09 mu W Low Power Front-End Biopotential Amplifier for Biosignal Recording Tseng, Yuhwai; Ho, Yingchieh; Kao, Shuoting; Su, Chauchin
國立交通大學 2014-12-08T15:28:35Z Cumulative Differential Non linearity Testing of ADCs Chen, Hungkai; Ho, Yingchieh; Su, Chauchin
國立交通大學 2014-12-08T15:22:37Z A 0.1-0.3 V 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters Ho, Yingchieh; Su, Chauchin
國立交通大學 2014-12-08T15:22:23Z Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique Ho, Yingchieh; Chang, Chiachi; Su, Chauchin

Showing items 11-19 of 19  (1 Page(s) Totally)
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