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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
臺大學術典藏 2020-06-11T06:30:01Z A hardware-oriented design for weighted median filters. Chen, Chun-Te;Chen, Liang-Gee;Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; LIANG-GEE CHEN
臺大學術典藏 2020-06-11T06:29:48Z High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform. LIANG-GEE CHEN; Chen, Chun-Te; Chiueh, Tzi-Dar; Chen, Liang-Gee; Hsiao, Jue-Hsuan; Hsiao, Jue-Hsuan;Chen, Liang-Gee;Chiueh, Tzi-Dar;Chen, Chun-Te
臺大學術典藏 2018-09-10T05:15:51Z Hardware-oriented design for weighted median filters Chen, Chun-Te;Chen, Liang-Gee;Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; LIANG-GEE CHEN
臺大學術典藏 2018-09-10T04:47:25Z High throughput CORDIC-based systolic array design for the discrete cosine transform Hsiao, Jue-Hsuan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te; LIANG-GEE CHEN
臺大學術典藏 2018-09-10T04:47:25Z Design and VLSI implementation of real-time weighted median filters Hsiao, Jue-Hsuan; LIANG-GEE CHEN; Chen, Chun-Te;Chen, Liang-Gee;Chiueh, Tzi-Dar;Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Chiueh, Tzi-Dar
臺大學術典藏 2007-04-19T04:12:18Z A hardware-oriented design for weighted median filters Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan
國立臺灣大學 1995-09 A hardware-oriented design for weighted median filters Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan
國立臺灣大學 1994-12 Design and VLSI implementation of real-time weighted median filters Chen, Chun-Te; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan
臺大學術典藏 1994-12 Design and VLSI implementation of real-time weighted median filters Chen, Chun-Te; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan; Chen, Chun-Te; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan
國立臺灣大學 1994-06 High throughput CORDIC-based systolic array design for the discrete cosine transform Hsiao, Jue-Hsuan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te
臺大學術典藏 1994-06 High throughput CORDIC-based systolic array design for the discrete cosine transform Hsiao, Jue-Hsuan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te; Hsiao, Jue-Hsuan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te
國立臺灣大學 1994-04 An efficient pipelined VLSI implementation of rank order filter Chen, Chun-Ta; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan
臺大學術典藏 1994-04 An efficient pipelined VLSI implementation of rank order filter Chen, Chun-Ta; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan; Chen, Chun-Ta; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan

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