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"hsieh tung ying"的相關文件
顯示項目 1-10 / 21 (共3頁)
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| 國立交通大學 |
2019-04-03T06:44:26Z |
High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits
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Wu, Tsung-Ta; Huang, Wen-Hsien; Yang, Chih-Chao; Chen, Hung-Chun; Hsieh, Tung-Ying; Lin, Wei-Sheng; Kao, Ming-Hsuan; Chen, Chiu-Hao; Yao, Jie-Yi; Jian, Yi-Ling; Hsu, Chiung-Chih; Lin, Kun-Lin; Shen, Chang-Hong; Chueh, Yu-Lun; Shieh, Jia-Min |
| 國立交通大學 |
2019-04-02T06:04:36Z |
Location-controlled-grain Technique for Monolithic 3D BEOL FinFET Circuits
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Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Po-Tsang; Chen, Kuan-Neng; Wu, Wan-Chi; Chen, Shih-Wei; Chang, Chia-He; Shen, Chang-Hong; Shieh, Jia-Min; Hu, Chenming; Wu, Meng-Chyi; Yeh, Wen-Kuan |
| 臺大學術典藏 |
2018-09-10T06:54:49Z |
Formation of isocyanide complexes via acylation of diaminocarbene complexes
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Cho, Jian-Yang;Chen, Chi-Li;Hsieh, Tung-Ying;Kiang, Fu-Mei;Lee, Gene-Hsiang;Peng, Shie-Ming;Liu, Shiuh-Tzung; Cho, Jian-Yang; Chen, Chi-Li; Hsieh, Tung-Ying; Kiang, Fu-Mei; Lee, Gene-Hsiang; Peng, Shie-Ming; Liu, Shiuh-Tzung; SHIUH-TZUNG LIU |
| 國立交通大學 |
2018-08-21T05:56:39Z |
First Fully Functionalized Monolithic 3D(+) IoT Chip with 0.5 V Light-electricity Power Management, 6.8 GHz Wireless-communication VCO, and 4-layer Vertical ReRAM
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Hsueh, Fu-Kuo; Shen, Chang-Hong; Shieh, Jia-Min; Li, Kai-Shin; Chen, Hsiu-Chih; Huang, Wen-Hsien; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Lin, Chang-Hsien; Chen, Bo-Yuan; Shiao, Yu-Shao; Huang, Guo-Wei; Wong, Oi-Ying; Chen, Po-Hung; Yeh, Wen-Kuan |
| 國立交通大學 |
2018-08-21T05:54:19Z |
A sandwiched buffer layer enabling pulsed ultraviolet- and visible-laser annealings for direct fabricating poly-Si field-effect transistors on the polyimide
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Kao, Ming-Hsuan; Huang, Wen-Hsien; Shieh, Jia-Min; Shen, Chang-Hong; Lee, Pei-Kang; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Yu, Peichen |
| 國立交通大學 |
2017-04-21T06:56:37Z |
Enabling n-type polycrystalline Ge junctionless FinFET of low thermal budget by in situ doping of channel and visible pulsed laser annealing
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Huang, Wen-Hsien; Shieh, Jia-Min; Kao, Ming-Hsuan; Shen, Chang-Hong; Huang, Tzu-En; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Hsieh, Jin-Long; Yu, Peichen; Yeh, Wen-Kuan |
| 國立交通大學 |
2017-04-21T06:56:33Z |
Junction-less poly-Ge FinFET and charge-trap NVM fabricated by laser-enabled low thermal budget processes
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Huang, Wen-Hsien; Shieh, Jia-Min; Shen, Chang-Hong; Huang, Tzu-En; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Hsieh, Jin-Long; Yeh, Wen-Kuan |
| 國立交通大學 |
2017-04-21T06:49:48Z |
Record-high 121/62 mu A/mu m on-currents 3D stacked epi-like Si FETs with and without metal back gate
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Yang, Chih-Chao; Chen, Szu-Hung; Shieh, Jia-Min; Huang, Wen-Hsien; Hsieh, Tung-Ying; Shen, Chang-Hong; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Lee, Yao-Jen; Hou, Fu-Ju; Pan, Ci-Ling; Chang-Liao, Kuei-Shu; Hu, Chenming; Yang, Fu-Liang |
| 國立交通大學 |
2017-04-21T06:49:12Z |
Logic/Memory Hybrid 3D Sequentially Integrated Circuit Using Low Thermal Budget Laser Process
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Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Shen, Chang-Hong; Kao, Ming-Hsuan; Yeh, Wen-Kuan; Chang, Meng-Fan; Wu, Meng-Chyi; Shieh, Jia-Min |
| 國立交通大學 |
2017-04-21T06:49:09Z |
a-SiGeC Thin Film Photovoltaic Enabled Self-Power Monolithic 3D IC Under Indoor Illumination
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Kao, Ming-Hsuan; Yang, Chih-Chao; Wu, Tsung-Ta; Hsieh, Tung-Ying; Huang, Wen-Hsieh; Wang, Hsing-Hsiang; Shen, Chang-Hong; Yeh, Wen-Kuan; Chang, Meng-Fan; Shieh, Jia-Min |
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