| 臺大學術典藏 |
2022-01-03T08:00:59Z |
Single Event Effect of the Combinational Circuit by Femtosecond Pulse Laser
|
Pei-Kai Liao; Yu-Lin Chen; Hsin-Shu Chen*; Jia-Han Li*; Pei-Yuan Chu; Chia-Ray Chen; Chien-Kai Tseng; JIA-HAN LI |
| 臺大學術典藏 |
2022-01-03T08:00:59Z |
Short Pulse Laser and Proton Beam For Testing Single Event Effect on Digital Inverter Circuit
|
Pei-Kai Liao; Yu-Lin Chen; Hsin-Shu Chen; Jia-Han Li*; Pei-Yuan Chu; Chia-Ray Chen; Chien-Kai Tseng; 廖培凱; 陳昱霖; 陳信樹; 李佳翰*; 朱培源; 陳嘉瑞; 曾建凱; JIA-HAN LI |
| 臺大學術典藏 |
2021-09-02T00:04:59Z |
A 34.3?dB SNDR, 2.3GS/s, Sub-radix pipeline ADC using incomplete settling technique with background radix detector
|
Chen H.-S;Tseng C.-J;Chen C.-M;Chen H.-W.; Chen H.-S; Tseng C.-J; Chen C.-M; Chen H.-W.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2021-09-02T00:04:59Z |
An 89.55dB-SFDR 179.6dB-FoM s 12-bit lMS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
|
Hu Y.-S;Lin J.-H;Lin D.-G;Lin K.-Y;Chen H.-S.; Hu Y.-S; Lin J.-H; Lin D.-G; Lin K.-Y; Chen H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2021-09-02T00:04:59Z |
A 10-bit 300 MS/s pipeline ADC with time-domain MDAC
|
Chen H.-S;Tseng C.-J;Chuang Y.-W;Chang C.-W.; Chen H.-S; Tseng C.-J; Chuang Y.-W; Chang C.-W.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2021-05-24T13:07:20Z |
A 10-bit 300 MS/s pipeline ADC with time-domain MDAC
|
HSIN-SHU CHEN; Tseng, Chien Jian; Chuang, Yu Wei; Chang, Chun Wei |
| 臺大學術典藏 |
2020-06-11T06:48:28Z |
A 0.9V 15fJ/conversion-step 8-bit 1.5GS/s two-step SAR ADC
|
Hu, Y.-S.;Huang, P.-C.;Yang, M.-T.;Wu, S.-W.;Chen, H.-S.; Hu, Y.-S.; Huang, P.-C.; Yang, M.-T.; Wu, S.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2020-06-11T06:48:28Z |
An 8-bit 900MS/S two-step SAR ADC
|
Huang, P.-C.;Hu, Y.-S.;Tai, H.-Y.;Chen, H.-S.; Huang, P.-C.; Hu, Y.-S.; Tai, H.-Y.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2020-06-11T06:48:28Z |
A Fast-Transient Switched-Capacitor DC-DC Converter with a Current Sensing Control Technique.
|
Chen, Chi-Wei;Chen, Hsin-Shu;Wu, Wen-Jong; Chen, Chi-Wei; Chen, Hsin-Shu; Wu, Wen-Jong; HSIN-SHU CHEN |
| 臺大學術典藏 |
2020-06-11T06:48:28Z |
A 12-bit 200kS/s subranging SAR ADC with an energy-curve reshape technique
|
Hu, Y.-S.;Lin, K.-Y.;Chen, H.-S.; Hu, Y.-S.; Lin, K.-Y.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
An 89.55dB-SFDR 179.6dB-FoMS 12-bit 1MS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
|
HSIN-SHU CHEN;Hsin-Shu Chen;Kai-Yue Lin;Ding-Guo Lin;Jhao-Huei Lin;Yao-Sheng Hu; Yao-Sheng Hu; Jhao-Huei Lin; Ding-Guo Lin; Kai-Yue Lin; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
An 89.55dB-SFDR 179.6dB-FoMS 12-bit 1MS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
|
HSIN-SHU CHEN;Hsin-Shu Chen;Kai-Yue Lin;Ding-Guo Lin;Jhao-Huei Lin;Yao-Sheng Hu; Yao-Sheng Hu; Jhao-Huei Lin; Ding-Guo Lin; Kai-Yue Lin; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
An 89.55dB-SFDR 179.6dB-FoMS 12-bit 1MS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
|
HSIN-SHU CHEN;Hsin-Shu Chen;Kai-Yue Lin;Ding-Guo Lin;Jhao-Huei Lin;Yao-Sheng Hu; Yao-Sheng Hu; Jhao-Huei Lin; Ding-Guo Lin; Kai-Yue Lin; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
An 89.55dB-SFDR 179.6dB-FoMS 12-bit 1MS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
|
HSIN-SHU CHEN;Hsin-Shu Chen;Kai-Yue Lin;Ding-Guo Lin;Jhao-Huei Lin;Yao-Sheng Hu; Yao-Sheng Hu; Jhao-Huei Lin; Ding-Guo Lin; Kai-Yue Lin; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 12.5fJ/conversion-step 8-bit 800 MS/s Two-Step SAR ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Hung-Yen Tai;Po-Chao Huang;Yao-Sheng Hu; Yao-Sheng Hu; Po-Chao Huang; Hung-Yen Tai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 12.5fJ/conversion-step 8-bit 800 MS/s Two-Step SAR ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Hung-Yen Tai;Po-Chao Huang;Yao-Sheng Hu; Yao-Sheng Hu; Po-Chao Huang; Hung-Yen Tai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 12.5fJ/conversion-step 8-bit 800 MS/s Two-Step SAR ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Hung-Yen Tai;Po-Chao Huang;Yao-Sheng Hu; Yao-Sheng Hu; Po-Chao Huang; Hung-Yen Tai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 12.5fJ/conversion-step 8-bit 800 MS/s Two-Step SAR ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Hung-Yen Tai;Po-Chao Huang;Yao-Sheng Hu; Yao-Sheng Hu; Po-Chao Huang; Hung-Yen Tai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A Current Average Control Method for Transient-Glitch Reduction in Variable Frequency DC-DC Converters
|
HSIN-SHU CHEN;Yi-Jan Emery Chen;Jau-Horng Chen;Jia-Nan Tai;Hsin-Shu Chen; Hsin-Shu Chen; Jia-Nan Tai; Jau-Horng Chen; Yi-Jan Emery Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A Current Average Control Method for Transient-Glitch Reduction in Variable Frequency DC-DC Converters
|
HSIN-SHU CHEN;Yi-Jan Emery Chen;Jau-Horng Chen;Jia-Nan Tai;Hsin-Shu Chen; Hsin-Shu Chen; Jia-Nan Tai; Jau-Horng Chen; Yi-Jan Emery Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A Current Average Control Method for Transient-Glitch Reduction in Variable Frequency DC-DC Converters
|
HSIN-SHU CHEN;Yi-Jan Emery Chen;Jau-Horng Chen;Jia-Nan Tai;Hsin-Shu Chen; Hsin-Shu Chen; Jia-Nan Tai; Jau-Horng Chen; Yi-Jan Emery Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A Current Average Control Method for Transient-Glitch Reduction in Variable Frequency DC-DC Converters
|
HSIN-SHU CHEN;Yi-Jan Emery Chen;Jau-Horng Chen;Jia-Nan Tai;Hsin-Shu Chen; Hsin-Shu Chen; Jia-Nan Tai; Jau-Horng Chen; Yi-Jan Emery Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting
|
HSIN-SHU CHEN;Wen-Jong Wu;Micka?l Lallart;Hsin-Shu Chen;Kai-Ren Cheng; Kai-Ren Cheng; Hsin-Shu Chen; Micka?l Lallart; Wen-Jong Wu; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting
|
HSIN-SHU CHEN;Wen-Jong Wu;Micka?l Lallart;Hsin-Shu Chen;Kai-Ren Cheng; Kai-Ren Cheng; Hsin-Shu Chen; Micka?l Lallart; Wen-Jong Wu; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting
|
HSIN-SHU CHEN;Wen-Jong Wu;Micka?l Lallart;Hsin-Shu Chen;Kai-Ren Cheng; Kai-Ren Cheng; Hsin-Shu Chen; Micka?l Lallart; Wen-Jong Wu; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:33Z |
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting
|
HSIN-SHU CHEN;Wen-Jong Wu;Micka?l Lallart;Hsin-Shu Chen;Kai-Ren Cheng; Kai-Ren Cheng; Hsin-Shu Chen; Micka?l Lallart; Wen-Jong Wu; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC
|
HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
An 8b 700MS/s 1b/cycle SAR ADC Using a Delay-Shift Technique
|
HSIN-SHU CHEN;Hsin-Shu Chen;Cheng-Hsueh Tsai;Pao-Yang Tsai;Hung-Yen Tai;Tsung-Han Tsai; Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
An 8b 700MS/s 1b/cycle SAR ADC Using a Delay-Shift Technique
|
HSIN-SHU CHEN;Hsin-Shu Chen;Cheng-Hsueh Tsai;Pao-Yang Tsai;Hung-Yen Tai;Tsung-Han Tsai; Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
An 8b 700MS/s 1b/cycle SAR ADC Using a Delay-Shift Technique
|
HSIN-SHU CHEN;Hsin-Shu Chen;Cheng-Hsueh Tsai;Pao-Yang Tsai;Hung-Yen Tai;Tsung-Han Tsai; Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-31T07:12:32Z |
An 8b 700MS/s 1b/cycle SAR ADC Using a Delay-Shift Technique
|
HSIN-SHU CHEN;Hsin-Shu Chen;Cheng-Hsueh Tsai;Pao-Yang Tsai;Hung-Yen Tai;Tsung-Han Tsai; Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN |
| 臺大學術典藏 |
2019-10-15T03:05:31Z |
Roles of Epstein-Barr virus viral load monitoring in the prediction of posttransplant lymphoproliferative disorder in pediatric liver transplantation
|
Chang, MH;YUNG-MING JENG;Hsu, HY;YEN-HSUAN NI;Chen, HL;JIA-FENG WU;REY-HENG HU;MING-CHIH HO;HSIN-SHU CHEN; HSIN-SHU CHEN; MING-CHIH HO; REY-HENG HU; JIA-FENG WU; Chen, HL; YEN-HSUAN NI; Hsu, HY; YUNG-MING JENG; Chang, MH |
| 臺大學術典藏 |
2019-10-15T03:05:31Z |
Roles of Epstein-Barr virus viral load monitoring in the prediction of posttransplant lymphoproliferative disorder in pediatric liver transplantation
|
Chang, MH;YUNG-MING JENG;Hsu, HY;YEN-HSUAN NI;Chen, HL;JIA-FENG WU;REY-HENG HU;MING-CHIH HO;HSIN-SHU CHEN; HSIN-SHU CHEN; MING-CHIH HO; REY-HENG HU; JIA-FENG WU; Chen, HL; YEN-HSUAN NI; Hsu, HY; YUNG-MING JENG; Chang, MH |
| 臺大學術典藏 |
2018-09-10T15:33:01Z |
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
|
Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN; Tsung-Han Tsai;Hung-Yen Tai;Pao-Yang Tsai;Cheng-Hsueh Tsai;Hsin-Shu Chen |
| 臺大學術典藏 |
2018-09-10T15:33:01Z |
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
|
Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN; Tsung-Han Tsai;Hung-Yen Tai;Pao-Yang Tsai;Cheng-Hsueh Tsai;Hsin-Shu Chen |
| 臺大學術典藏 |
2018-09-10T15:33:01Z |
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
|
Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN; Tsung-Han Tsai;Hung-Yen Tai;Pao-Yang Tsai;Cheng-Hsueh Tsai;Hsin-Shu Chen |
| 臺大學術典藏 |
2018-09-10T15:22:47Z |
A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS
|
Hu, Y.-S.;Shih, C.-H.;Tai, H.-Y.;Chen, H.-W.;Chen, H.-S.; Hu, Y.-S.; Shih, C.-H.; Tai, H.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T14:57:27Z |
A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS
|
Tai, H.-Y.;Tsai, C.-H.;Tsai, P.-Y.;Chen, H.-W.;Chen, H.-S.; Tai, H.-Y.; Tsai, C.-H.; Tsai, P.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T14:57:27Z |
A 6-Bit 1 GS/s pipeline ADC using incomplete settling with background sampling-point calibration
|
Lai, C.-F.; Chen, H.-S.; HSIN-SHU CHEN; Tseng, C.-J.;Lai, C.-F.;Chen, H.-S.; Tseng, C.-J. |
