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"hsin shu chen"的相關文件
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| 臺大學術典藏 |
2018-09-10T15:33:01Z |
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
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Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN; Tsung-Han Tsai;Hung-Yen Tai;Pao-Yang Tsai;Cheng-Hsueh Tsai;Hsin-Shu Chen |
| 臺大學術典藏 |
2018-09-10T15:33:01Z |
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
|
Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN; Tsung-Han Tsai;Hung-Yen Tai;Pao-Yang Tsai;Cheng-Hsueh Tsai;Hsin-Shu Chen |
| 臺大學術典藏 |
2018-09-10T15:22:47Z |
A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS
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Hu, Y.-S.;Shih, C.-H.;Tai, H.-Y.;Chen, H.-W.;Chen, H.-S.; Hu, Y.-S.; Shih, C.-H.; Tai, H.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T14:57:27Z |
A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS
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Tai, H.-Y.;Tsai, C.-H.;Tsai, P.-Y.;Chen, H.-W.;Chen, H.-S.; Tai, H.-Y.; Tsai, C.-H.; Tsai, P.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T14:57:27Z |
A 6-Bit 1 GS/s pipeline ADC using incomplete settling with background sampling-point calibration
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Lai, C.-F.; Chen, H.-S.; HSIN-SHU CHEN; Tseng, C.-J.;Lai, C.-F.;Chen, H.-S.; Tseng, C.-J. |
| 臺大學術典藏 |
2018-09-10T14:57:27Z |
11.2 A 0.85fJ/conversion-step 10b 200kS/s subranging SAR ADC in 40nm CMOS
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Tai, H.-Y.;Hu, Y.-S.;Chen, H.-W.;Chen, H.-S.; Tai, H.-Y.; Hu, Y.-S.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T09:47:37Z |
A 10-Bit 200 MS/s capacitor-sharing pipeline ADC
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Tseng, C.-J.;Hsieh, Y.-C.;Yang, C.-H.;Chen, H.-S.; Tseng, C.-J.; Hsieh, Y.-C.; Yang, C.-H.; Chen, H.-S.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T09:21:52Z |
A highly integrated class-D amplifier using driver delay hysteresis control
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Tai, J.-N.; Chen, H.-S.; Chiu, H.-Q.; HSIN-SHU CHEN |
| 臺大學術典藏 |
2018-09-10T09:21:52Z |
A high-efficiency CMOS dc-dc converter with 9-μs transient recovery time
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HSIN-SHU CHEN; Chen, Jau-Horng; YI-JAN EMERY CHEN; Chen, Y.-J.E.; Chen, J.-H.; Chen, H.-S.; Tai, J.-N.; Liu, P.-J.; Ye, W.-S.; Ye, W.-S.; Tai, J.-N.; Chen, H.-S.; Chen, J.-H.; Chen, Y.-J.E.; Liu, Pang-Jung; Ye, Wei-Shan; Tai, Jia-Nan; Chen, Hsin-Shu; Chen, Jau-Horng; Chen, Yi-Jan Emery |
| 臺大學術典藏 |
2018-09-10T09:21:52Z |
A 3.2fJ/c.-s. 0.35V 10b 100KS/s SAR ADC in 90nm CMOS
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Tai, H.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
顯示項目 46-55 / 68 (共7頁)
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