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"hsiung w y"
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| 臺大學術典藏 |
2018-09-10T09:21:47Z |
60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flip-chip CMOS process
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Lu, Y.-F.; Huang, T.-Y.; Chang, Y.-L.; Hsieh, Y.-K.; Peng, P.-J.; Chang, I.-C.; Tsai, T.-C.; Kao, K.-Y.; Hsiung, W.-Y.; Wang, J.; Hsu, Y.A.; Lin, K.-Y.; Lu, H.-C.; Lin, Y.-C.; Lu, L.-H.; Huang, T.-W.; Wu, R.-B.; Wang, H.; Kuo, J.-L.; HSIN-CHIA LU; YI-CHENG LIN; KUN-YOU LIN et al. |
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