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Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2018-08-21T05:56:55Z |
On Effective Flip-Chip Routing via Pseudo Single Redistribution Layer
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Hsu, Hsin-Wu; Chen, Meng-Ling; Chen, Hung-Ming; Li, Hung-Chun; Chen, Shi-Hao |
國立交通大學 |
2018-08-21T05:56:51Z |
Area-I/O RDL Routing for Chip-Package Codesign Considering Regional Assignment
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Lin, Kun-Sheng; Hsu, Hsin-Wu; Lee, Ren-Jie; Chen, Hung-Ming |
國立交通大學 |
2014-12-12T01:46:32Z |
晶片-封裝-印刷電路板的介面設計之演算法
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徐欣吳; Hsu, Hsin-Wu; 陳宏明; Chen, Hung-Ming |
國立交通大學 |
2014-12-08T15:31:02Z |
Board- and Chip-Aware Package Wire Planning
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Lee, Ren-Jie; Hsu, Hsin-Wu; Chen, Hung-Ming |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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