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Showing items 1-10 of 15 (2 Page(s) Totally)
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| 國立交通大學 |
2014-12-16T06:15:37Z |
Suspended nanochannel transistor structure and method for fabricating the same
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Lin, Horng-Chin; Su, Chun-Jung; Hsu, Hsing-Hui; Li, Guan-Jang |
| 國立交通大學 |
2014-12-16T06:14:18Z |
Suspended nanochannel transistor structure and method for fabricating the same
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Lin Horng-Chih; Su Chun-Jung; Hsu Hsing-Hui; Li Guan-Jang |
| 國立交通大學 |
2014-12-12T01:37:50Z |
新穎多閘極多晶矽奈米線薄膜電晶體之研製與其應用
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徐行徽; Hsu, Hsing-Hui; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:48:15Z |
Tr-gate Poly-Si Thin-Film Transistor with Nanowire Channels
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Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
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Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:20:10Z |
Tri-gated Poly-Si Nanowire SONOS Devices
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Hsu, Hsing-Hui; Liu, Ta-Wei; Lin, Chuan-Ding; Chia Kuo-Jung; Huang, Tiao-Yuan; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:12:04Z |
Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices
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Hsu, Hsing-Hui; Lin, Horng-Chih; Luo, Cheng-Wei; Su, Chun-Jung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:11:16Z |
A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gate
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Lin, Horng-Chih; Hsu, Hsing-Hui; Su, Chun-Jung; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:10:41Z |
Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device Fluctuations
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Hsu, Hsing-Hui; Liu, Ta-Wei; Chan, Leng; Lin, Chuan-Ding; Huang, Tiao-Yuan; Lin, Horng-Chih |
| 國立交通大學 |
2014-12-08T15:10:06Z |
Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping Layer
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Lee, Ko-Hui; Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
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