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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"hsu kc"的相關文件
顯示項目 21-30 / 53 (共6頁)
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| 國立交通大學 |
2014-12-08T15:37:23Z |
A cost-effective fast frequency-hopped code-division multiple-access light source using self-seeded Fabry-Perot laser with fiber Bragg grating array
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Peng, WR; Peng, PC; Lin, WP; Hsu, KC; Lai, YC; Chi, S |
| 國立交通大學 |
2014-12-08T15:26:37Z |
On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS process
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Ker, MD; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:26:34Z |
ESD protection design for mixed-voltage I/O circuit with substrate-triggered technique in sub-quarter-micron CMOS process
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Ker, MD; Chuang, CH; Hsu, KC; Lo, WY |
| 國立交通大學 |
2014-12-08T15:26:29Z |
Complementary substrate-triggered SCR devices for on-chip ESD protection circuits
|
Ker, MD; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:25:56Z |
Native-NMOS-triggered SCR (NANSCR) for ESD protection in 0.13-mu m CMOS integrated circuits
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Ker, MD; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:25:38Z |
Self-substrate-triggered technique to enhance turn-on uniformity of multi-finger ESD protection devices
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Ker, MD; Chen, JH; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:25:22Z |
Design on power-rail ESD clamp circuit for 3.3-V I/O interface by using only 1-V/2.5-V low-voltage devices in a 130-nm CMOS process
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Ker, MD; Chen, WY; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:25:09Z |
Miniaturized 3-dimensional transformer design
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Chen, WZ; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:19:14Z |
SCR device fabricated with dummy-gate structure to improve turn-on speed for effective ESD protection in CMOS technology
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Ker, MD; Hsu, KC |
| 國立交通大學 |
2014-12-08T15:19:08Z |
Fiber Bragg grating sequential UV-writing method with real-time interferometric side-diffraction position monitoring
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Hsu, KC; Sheu, LG; Chuang, KP; Chang, SH; Lai, YC |
顯示項目 21-30 / 53 (共6頁)
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