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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"huang chao tsung"的相關文件
顯示項目 16-25 / 41 (共5頁)
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| 臺大學術典藏 |
2005-04 |
Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005-03 |
Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
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Huang, Chao-Tsung; Chen, Ching-Yeh; Chen, Yi-Hau; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
針對離散小波轉換以及移動補償式時間濾波之積體電路架構設計與分析
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黃朝宗; Huang, Chao-Tsung |
| 國立臺灣大學 |
2005 |
Advances in Hardware Architectures for Image and Video Coding—A Survey
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Tseng, Po-Chih; Chang, Yung-Chi; Huang, Yu-Wen; Fang, Hung-Chi; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
VLSI Architecture for Lifting-based Shape-Adaptive Discrete Wavelet Transform with Odd-symmetric Filters
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems
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Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
B-spline factorization-based architecture for inverse discrete wavelet transform
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Memory analysis and architecture for two-dimensional discrete wavelet transform
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
顯示項目 16-25 / 41 (共5頁)
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