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"huang k p"的相關文件
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| 臺大學術典藏 |
2019-12-19T07:11:35Z |
Characteristics of seismic energy release of subduction zones-examples from Taiwan
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Jeng, F.S.; Lin, M.L.; Lu, C.Y.; Huang, K.P.; FU-SHU JENG |
| 臺大學術典藏 |
2019-12-19T07:11:30Z |
Buckling folds of a single layer embedded in matrix - Theoretical solutions and characteristics
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Jeng, F.S.; Huang, K.P.; FU-SHU JENG |
| 臺大學術典藏 |
2019-12-19T07:11:27Z |
Analytical solution of folding behaviors of multi-layer viscous strata
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Jeng, F.-S.; Huang, K.-P.; Chang, K.-J.; FU-SHU JENG |
| 國立交通大學 |
2019-04-02T06:04:37Z |
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
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Sung, P. -J.; Chang, C. -Y.; Chen, L. -Y.; Kao, K. -H.; Su, C. -J.; Liao, T. -H.; Fang, C. -C.; Wang, C. -J.; Hong, T. -C.; Jao, C. -Y.; Hsu, H. -S.; Luo, S. -X.; Wang, Y. -S.; Huang, H. -F.; Li, J. -H.; Huang, Y. -C.; Hsueh, F. -K.; Wu, C. -T.; Huang, Y. -M.; Hou, F. -J.; Luo, G. -L.; Shen, Y. -L.; Ma, W. C. -Y.; Huang, K. -P.; Lin, K. -L.; Samukawa, S.; Li, Y.; Huang, G. -W; Lee, Y. -J.; Li, J. -Y.; Wu, W. -F.; Shieh, J. -M.; Chao, T. -S.; Yeh, W. -K.; Wang, Y. -H. |
| 國立臺灣科技大學 |
2019 |
Design of Power Decoupling Strategy for Single-Phase Grid-Connected Inverter under Nonideal Power Grid
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Huang, K.-P.;Wang, Y.;Wai, R.-J. |
| 國立成功大學 |
2019 |
First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications
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Chang, S.-W.;Li, J.-H.;Huang, M.-K.;Huang, Y.-C.;Huang, S.-T.;Wang, H.-C.;Huang, Y.-J.;Wang, J.-Y.;Yu, L.-W.;Huang, Y.-F.;Hsueh, F.-K.;Sung, P.-J.;Wu, C.-T.;Ma, W.C.-Y.;Kao, Kao K.-H.;Lee, Y.-J.;Lin, C.-L.;Chuang, R.W.;Huang, K.-P.;Samukawa, Samukawa S.;Li, Y.;Lee, W.-H.;Chu, T.-Y.;Chao, T.-S.;Huang, G.-W.;Wu, Wu W.-F.;Li, J.-Y.;Shieh, J.-M.;Yeh, W.-K.;Wang, Y.-H.;Lu, D.D.;Wang, C.-J.;Lin, N.-C.;Su, C.-J.;Lo, S.-H.;Huang, Huang H.-F. |
| 國立成功大學 |
2019 |
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
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Sung, P.-J.;Chang, Chang C.-Y.;Chen, L.-Y.;Kao, Kao K.-H.;Su, C.-J.;Liao, T.-H.;Fang, C.-C.;Wang, C.-J.;Hong, T.-C.;Jao, C.-Y.;Hsu, Hsu H.-S.;Luo, S.-X.;Wang, Y.-S.;Huang, Huang H.-F.;Li, J.-H.;Huang, Y.-C.;Hsueh, F.-K.;Wu, C.-T.;Huang, Y.-M.;Hou, F.-J.;Luo, G.-L.;Huang, Y.-C.;Shen, Y.-L.;Ma, W.C.-Y.;Huang, K.-P.;Lin, K.-L.;Samukawa, Samukawa S.;Li, Y.;Huang, G.-W.;Lee, Y.-J.;Li, J.-Y.;Wu, Wu W.-F.;Shieh, J.-M.;Chao, T.-S.;Yeh, W.-K.;Wang, Y.-H. |
| 國立成功大學 |
2019 |
Fabrication of omega-gated negative capacitance finfets and SRAM
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Sung, P.-J.;Su, C.-J.;Lu, D.D.;Luo, S.-X.;Kao, Kao K.-H.;Ciou, J.-Y.;Jao, C.-Y.;Hsu, Hsu H.-S.;Wang, C.-J.;Hong, T.-C.;Liao, T.-H.;Fang, C.-C.;Wang, Y.-S.;Huang, Huang H.-F.;Li, J.-H.;Huang, Y.-C.;Hsueh, F.-K.;Wu, C.-T.;Ma, W.C.-Y.;Huang, K.-P.;Lee, Y.-J.;Chao, T.-S.;Li, J.-Y.;Wu, Wu W.-F.;Yeh, W.-K.;Wang, Y.-H. |
| 臺大學術典藏 |
2018-09-10T08:21:35Z |
Buckling folds of a single layer embedded in matrix - Folding behavior revealed by numerical analysis
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Huang, K.-P.; Chang, K.-J.; Wang, T.-T.; Jeng, F.-S.; Huang, Kuo-Pin; TAI-TIEN WANG; Chang, Kuo-Jen; Wang, Tai-Tien; Jeng, Fu-Shu |
| 國立交通大學 |
2018-08-21T05:56:59Z |
Ge Nanowire FETs with HfZrOx Ferroelectric Gate Stack Exhibiting SS of Sub-60 mV/dec and Biasing Effects on Ferroelectric Reliability
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Su, C. -J.; Hong, T. -C.; Tsou, Y. -C.; Hou, F. -J.; Sung, P. -J.; Yeh, M. -S.; Wan, C. -C.; Kao, K. -H.; Tang, Y. -T.; Chiu, C. -H.; Wang, C. -J.; Chung, S. -T.; You, T. -Y.; Huang, Y. -C.; Wu, C. -T.; Lin, K. -L.; Luo, G. -L.; Huang, K. -P.; Lee, Y. -J.; Chao, T. -S.; Wu, W. -F.; Huang, G. -W.; Shieh, J. -M.; Yeh, W. -K.; Wang, Y. -H. |
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