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Taiwan Academic Institutional Repository >
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"huang shi yi"
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| 東吳大學 |
2018-09 |
Sponge-Like Water De-/Ad-Sorption versus Solid-State Structural Transformation and Colour-Changing Behavior of an Entangled 3D Composite Supramolecuar Architecture, [Ni4(dpe)4(btc)2(Hbtc)(H2O)9]·3H2O
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Wang, Chih-Chieh; Ke, Szu-Yu; Chen, Kuan-Ting; Sun, Ning-Kuei; Liu, Wei-Fang; Ho, Mei-Lin; Lu, Bing-Jyun; Hsieh, Yi-Ting; Chuang, Yu-Chun; Lee, Gene-Hsiang; Huang, Shi-Yi; Yang, En-Che |
| 國立交通大學 |
2014-12-12T02:05:56Z |
以工作複雜性觀點論預算之設立
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黃詩易; HUANG, SHI-YI; 巫永森; WU, YONG-SEN |
| 國立彰化師範大學 |
2011-04 |
A High Speed Design Using Divide-and-Conquer Architecture for Motion Estimation
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Wu, Tsung-Yi; Huang, Shi-Yi |
| 國立彰化師範大學 |
2010-01 |
Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC Designs
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Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern |
| 大葉大學 |
2009-05-25 |
A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm
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Wu, Tsung-Yi;Lin, How-Rern;Chen, Kuang-Yao;Huang, Shi-Yi;Li, Tai-Lun |
| 大葉大學 |
2009-05-25 |
A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers
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Wu, Tsung-Yi;Lin, How-Rern;Kao, Tzi-Wei;Huang, Shi-Yi;Li, Tai-Lun |
| 國立彰化師範大學 |
2009-05 |
A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm
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Wu, Tsung-Yi; Chen, Kuang-Yao; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern |
| 國立彰化師範大學 |
2009-05 |
A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers
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Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern |
Showing items 1-8 of 8 (1 Page(s) Totally)
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