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Taiwan Academic Institutional Repository >
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"huang shih hsu"
Showing items 11-20 of 30 (3 Page(s) Totally)
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| 中原大學 |
2006-06 |
New 2-D Adaptive Filter for Y/C Separation in Composite Signals
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Lin, Chun-Hung;Huang, Shih-Hsu |
| 中原大學 |
2006-06 |
同時進行運算排序及運算時間選擇以最小化週期與週期間的功率差異 Simultaneous Operation Scheduling and Operation Delay Selection for Minimizing Cycle-By-Cycle Power Differential
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Yen, Wei-Ting;Huang, Shih-Hsu;Cheng, Chun-Hua |
| 中原大學 |
2005-05 |
Simultaneous Clock Selection and Operation Scheduling for Multi-Cycle Communication
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Huang, Shih-Hsu;Chiang, Chung-Hsin;Cheng, Chun-Hua |
| 中原大學 |
2004-12 |
A High Speed Fuzzy Inference Processor with Dynamic Analysis and Scheduling Capabilities
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Huang, Shih-Hsu;Lai, Jian-Yuan |
| 中原大學 |
2004-12 |
Downlink Base Transmit Station Modulator in WCDMA System
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Bai, Kai-Hao;Huang, Shih-Hsu |
| 中原大學 |
2004-06 |
用於網路封包分類器的特殊用途內容定址記憶體
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黃世旭;李龍恩;黃曼玲 ;Huang, Shih-Hsu;Lee, Long-En;Huang, Man-Lin |
| 中原大學 |
2003-12 |
Clock Skew Scheduling for Peak Current Minimization
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Chang, Chia-Ming;Huang, Shih-Hsu;Nieh, Yow-Tyng |
| 中原大學 |
2003-08 |
Process-Variation-Tolerant Clock Tree Design Methodology
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Huang, Shih-Hsu;Lin, Yu-Hui;Nieh, Yow-Tyng |
| 中原大學 |
2002-11 |
A High Speed Fuzzy Infernece Processor with Dynamic Scheduling Capability
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Huang, Shih-Hsu;Lai, Jian-Yuan |
| 中原大學 |
2002-08 |
Clock Period Minimization by Incorporating Clock Skew Scheduling and Gate-Level Delay Insertion
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Huang, Shih-Hsu;Nieh, Yow-Tyng |
Showing items 11-20 of 30 (3 Page(s) Totally)
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