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Taiwan Academic Institutional Repository >
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"huang shih hsu"
Showing items 26-30 of 30 (1 Page(s) Totally) 1 View [10|25|50] records per page
| 中原大學 |
1999-12 |
A Practical Clock Tree Synthesis Flow
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Chi, Mely-Chen;Huang, Shih-Hsu |
| 國立臺灣大學 |
1995 |
A new approach to schedule operations across nested-ifs and nested-loops
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Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 國立臺灣大學 |
1995 |
A new scheduling algorithm for synthesizing the control blocks of control-dominated circuits
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Huang, Shih-Hsu; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 臺大學術典藏 |
1995 |
A new approach to schedule operations across nested-ifs and nested-loops
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Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen; Huang, Shih-Hsu; Hwang, Cheng-Tsung; Hsu, Yu-Chin; Oyang, Yen-Jen |
| 臺大學術典藏 |
1995 |
Synthesis of false loop free circuits.
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Huang, Shih-Hsu; Liu, Ta-Yung; Hsu, Yu-Chin; Oyang, Yen-Jen; YEN-JEN OYANG |
Showing items 26-30 of 30 (1 Page(s) Totally) 1 View [10|25|50] records per page
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