| 國立交通大學 |
2014-12-12T01:46:13Z |
一種具懸浮奈米通道之元件製作與其分析模型
|
許宇賢; Hsu, Yu-Hsien; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:46:11Z |
具獨立雙閘極之P型聚集模式多晶矽奈米線電晶體的製作與特性分析
|
吳俊鵬; Wu, Jiun-Peng; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:46:11Z |
非對稱蕭特基能障薄膜電晶體與浮停閘極記憶體元件之製作與特性分析
|
林歷樺; Lin, Li-Hua; 林鴻志; 黃調元; Lin ,Horng-Chih; Huang,Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:50Z |
新穎多閘極多晶矽奈米線薄膜電晶體之研製與其應用
|
徐行徽; Hsu, Hsing-Hui; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:16Z |
多晶鍺奈米線薄膜電晶體與無接面多晶矽奈米線場效電晶體製作與特性分析
|
劉禹伶; Liou, Yu-Ling; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:16Z |
具有昇起式源/汲極之多晶鍺薄膜電晶體的元件製作與特性分析
|
陳冠宇; Chen, Kuan-Yu; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:14Z |
金屬誘發側向結晶複晶矽P型多晶矽薄膜電晶體的元件特性及熱載子效應研究
|
林庭輔; Lin, Tin-Fu; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:11Z |
射頻橫向擴散金氧半場效電晶體之小信號特性分析與模型
|
陳宇航; Chen, Yu-Hang; 林鴻志; 黃調元; 陳坤明; Lin, Horng-Chih; Huang, Tiao-Yuan; Chen, Kun-Ming |
| 國立交通大學 |
2014-12-12T01:37:10Z |
多晶矽奈米線薄膜電晶體之研製與應用於酸鹼感測器之研究
|
陳冠智; Chen, Kuan-Chih; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:08Z |
具懸浮奈米線結構之新穎元件的製作與特性分析
|
許家維; Hsu, Chia-Wei; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:07Z |
使用I-Line雙重曝光技術實現非對稱0.1μm P型金氧半場效電晶體與相關可靠度問題之研究
|
張博翔; Chang, Po-Hisang; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:37:06Z |
多晶矽奈米線結合內嵌式奈米矽晶體之SONOS記憶體元件之研究
|
羅正瑋; Luo, Cheng-Wei; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:31:04Z |
新穎矽奈米線元件之研製與應用
|
蘇俊榮; Su, Chun-Jung; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:30:53Z |
具有氮化矽覆蓋之形變通道金氧半場效電晶體特性與相關可靠性問題研究
|
盧景森; Lu, Ching-Sen; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:27:12Z |
利用雙重微影成像法製作非對稱P型金氧半場效電晶體之研究
|
張格綸; Chang, Ke-lun; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:27:03Z |
使用I射線步進機的雙重圖形曝光技術以及其應用在元件製作之研究
|
謝瑞桀; Hsieh, Rei-Jay; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:27:01Z |
利用新穎結構對P型複晶矽薄膜電晶體進行之熱載子衰退機制分析
|
陳政建; Chan, Cheng-Kin; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:26:58Z |
多晶鍺元件的研製與分析
|
張佑寧; Chang, Yu-Ning; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:24:31Z |
一種具有懸浮奈米線通道之新式元件的研製與分析
|
李冠樟; Li, Guan-Jang; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-12T01:24:28Z |
具獨立雙閘極之多晶矽奈米線薄膜電晶體的研製與分析
|
陳威臣; Chen, Wei-Chen; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:48:15Z |
Tr-gate Poly-Si Thin-Film Transistor with Nanowire Channels
|
Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:48:04Z |
A study on low temperature transport properties of independent double-gated poly-Si nanowire transistors
|
Chen, Wei-Chen; Lin, Horng-Chih; Lin, Zer-Ming; Hsu, Chin-Tsai; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:42:31Z |
Impacts of SiN deposition parameters on n-channel metal-oxide-semiconductor field-effect-transistors
|
Lu, Ching-Sen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:42:29Z |
Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer
|
Tsai, Tzu-I; Lin, Horng-Chih; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Hsueh, Fu-Kuo; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:44Z |
Submicron organic thin-film transistors fabricated by film profile engineering method
|
Wu, Ming-Hung; Lin, Horng-Chih; Lin, Hung-Cheng; Zan, Hsiao-Wen; Meng, Hsin-Fei; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:25Z |
Fabrication of tri-gated junctionless poly-Si transistors with I-line based lithography
|
Lin, Cheng-I; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:25Z |
Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels
|
Tsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:24Z |
Implementation of Film Profile Engineering in the Fabrication of ZnO Thin-Film Transistors
|
Lyu, Rong-Jhe; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:23Z |
Effects of Ga2O3 deposition power on electrical properties of cosputtered In-Ga-Zn-O semiconductor films and thin-film transistors
|
Lee, Yih-Shing; Chang, Chih-Hsiang; Lin, Yuan-Che; Lyu, Rong-Jhe; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:06Z |
Fabrication and characterization of field-effect transistors with suspended-nanowire channels
|
Kuo, Chia-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:36:06Z |
The effects of channel doping concentration for n-type junction-less double-gate poly-Si nanostrip transistors
|
Liu, Keng-Ming; Peng, Fan-I; Peng, Kang-Ping; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:35:08Z |
Novel gate-all-around polycrystalline silicon nanowire memory device with HfAlO charge-trapping layer
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:33:57Z |
Investigation of p-type junction-less independent double-gate poly-Si nano-strip transistors
|
Liu, Keng-Ming; Lin, Zer-Ming; Wu, Jiun-Peng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:32:59Z |
Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire
|
Lee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact
|
Chen, Kun-Ming; Chen, Bo-Yuan; Chiu, Chia-Sung; Huang, Guo-Wei; Chen, Chun-Hao; Lin, Horng-Chih; Huang, Tiao-Yuan; Chen, Ming-Yi; Yang, Yu-Chi; Jaw, Brenda; Wang, Kai-Li |
| 國立交通大學 |
2014-12-08T15:32:31Z |
Fabrication of High-Performance ZnO Thin-Film Transistors With Submicrometer Channel Length
|
Lin, Horng-Chih; Lyu, Rong-Jhe; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:57Z |
Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors
|
Chen, Kun-Ming; Tsai, Tzu-I; Lin, Ting-Yao; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Guo-Wei; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:31:35Z |
A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires
|
Lin, Horng-Chih; Lin, Zer-Ming; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:52Z |
Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices
|
Luo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:35Z |
Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:32Z |
Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap
|
Kuo, Chia-Hao; Hsu, Chia-Wei; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:30:25Z |
Characteristics of Planar Junctionless Poly-Si Thin-Film Transistors With Various Channel Thickness
|
Lin, Horng-Chih; Lin, Cheng-I; Lin, Zer-Ming; Shie, Bo-Shiuan; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:29:51Z |
A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer
|
Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory Operations
|
Chen, Wei-Chen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:34Z |
Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization
|
Su, Chun-Jung; Huang, Yu-Feng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:28:11Z |
Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications
|
Tsai, Tzu-I; Chen, Kun-Ming; Lin, Horng-Chih; Lin, Ting-Yao; Su, Chun-Jung; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:25:06Z |
DC and AC NBTI stresses in pMOSFETs with PE-SiN capping
|
Lu, Chia-Yu; Lin, Horng-Chih; Chang, Yi-Feng; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:26Z |
A Novel Double-gated Nanowire TFT and Investigation of Its Size Dependency
|
Chen, Wei-Chen; Lin, Chuan-Ding; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2014-12-08T15:24:06Z |
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
|
Su, Chun-Jung; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; Chao, Tien-Sheng |
| 國立交通大學 |
2014-12-08T15:23:38Z |
Characteristics of n-Type Asymmetric Schottky-Barrier Transistors with Silicided Schottky-Barrier Source and Heavily n-Type Doped Channel and Drain
|
Lin, Zer-Ming; Lin, Horng-Chih; Huang, Tiao-Yuan |
