| 國立交通大學 |
2019-04-03T06:44:24Z |
Fabrication and Characterization of Film Profile Engineered ZnO TFTs With Discrete Gates
|
Lyu, Rong-Jhe; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2019-04-02T05:59:31Z |
A comparison of plasma-induced damage on the reliability between high-k/metal-gate and SiO2/poly-gate complementary metal oxide semiconductor technology
|
Weng, Wu-Te; Lee, Yao-Jen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2019-04-02T05:58:35Z |
A study on low temperature transport properties of independent double-gated poly-Si nanowire transistors
|
Chen, Wei-Chen; Lin, Horng-Chih; Lin, Zer-Ming; Hsu, Chin-Tsai; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-08-21T05:53:54Z |
Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors
|
Zhong, Chia-Wen; Lin, Horng-Chih; Tsai, Jung-Ruey; Liu, Kou-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-08-21T05:53:38Z |
100-nm IGZO Thin-Film Transistors With Film Profile Engineering
|
Lin, Horng-Chih; Shie, Bo-Shiuan; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:43:09Z |
以”薄膜輪廓工法”研製金屬氧化物薄膜電晶體及反向器
|
呂榮哲; 林鴻志; 黃調元; Lyu, Rong-Jhe; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:42:57Z |
以薄膜形貌工程製作非晶態銦鎵鋅氧化物單極性反向器之改善與分析
|
邱韻璇; 林鴻志; 黃調元; Chiu, Yun-Hsuan; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:42:53Z |
薄膜形貌工法電晶體之氧化鋅單極性反相器之製造與特性分析
|
楊儀辰; 林鴻志; 黃調元; Yang, I-Chen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:41:13Z |
氧化錫薄膜與P型氧化亞錫電晶體之研製與分析
|
鍾嘉文; 林鴻志; 黃調元; Zhong, Chia-Wen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:37:56Z |
氧化鋅上閘極薄膜電晶體及氮化鈦通道電晶體製作與特性分析
|
林妤珊; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:37:53Z |
具有T型閘極的自我對準氧化鋅薄膜電晶體之製作與特性分析
|
沈君達; 林鴻志; 黃調元; Shen, Jun-Da; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:37:38Z |
研究與提升保護層對於氧化鋅薄膜電晶體之影響
|
黃翔生; 林鴻志; 黃調元; Huang, Hsiang-Sheng; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:36:58Z |
具背向閘極之混合式P/N通道無接面場效電晶體之研究
|
吳宜剛; 張俊彥; 林鴻志; 黃調元; Wu, Yi-Kang; Chang, Chun-Yen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2018-01-24T07:36:25Z |
薄膜輪廓工法之非晶銦鎵鋅氧薄膜電晶體之研製與分析
|
謝博璿; 林鴻志; 黃調元; Shie, Bo-Shiuan; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:56:46Z |
High-Performance Submicrometer ZnON Thin-Film Transistors With Record Field-Effect Mobility
|
Kuan, Chin-I; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:56:32Z |
Downscaling Metal-Oxide Thin-Film Transistors to Sub-50 nm in an Exquisite Film-Profile Engineering Approach
|
Lyu, Rong-Jhe; Shie, Bo-Shiuan; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:55:48Z |
Impact of thermal oxygen annealing on the properties of tin oxide films and characteristics of p-type thin-film transistors
|
Zhong, Chia-Wen; Lin, Horng-Chih; Liu, Kou-Chen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:55:20Z |
A Film-Profile-Engineered 3-D InGaZnO Inverter Technology With Systematically Tunable Threshold Voltage
|
Lyu, Rong-Jhe; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:50:15Z |
Novel BEOL InGaZnO R-load-Type Logic-Gate Technology
|
Chan, Chin-Wen; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:47Z |
Stability of InGaZnO Thin-Film Transistors with Durimide Passivation
|
Shie, Bo-Shiuan; Chang, Chih-Bin; Chang, Hao-Chun; Lin, Horng-Chih; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:44Z |
Comparison of Electrical Characteristics of N-type Silicon Junctionless Transistors with and without Film Profile Engineering by TCAD Simulation
|
Tsai, Jung-Ruey; Lin, Horng-Chih; Chang, Hsiu-Fu; Shie, Bo-Shiuan; Wen, Ting-Ting; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:40Z |
STUDY OF GATE-INJECTION OPERATED SONOS-TYPE DEVICES USING THE GATE-SENSING AND CHANNEL-SENSING (GSCS) METHOD
|
Du, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan |
| 國立交通大學 |
2017-04-21T06:49:25Z |
High-gain, Low-voltage BEOL Logic Gate Inverter Built with Film Profile Engineered IGZO Transistors
|
Lyu, Rong-Jhe; Chiu, Yun-Hsuan; Lin, Horng-Chih; Li, Pei-Wen; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:10Z |
Impacts of a buffer layer and hi-wafers on the performance of strained-channel NMOSFETs with SiN capping layer
|
Tsai, Tzu-, I; Lee, Yao-Jen; Chen, King-Sheng; Wang, Jeff; Wan, Chia-Chen; Hsueh, Fu-Kuo; Lin, Horng-Chih; Chao, Tien-Sheng; Huang, Tiao-Yuan |
| 國立交通大學 |
2017-04-21T06:49:10Z |
A comprehensive model for plasma damage enhanced transistor reliability degradation
|
Weng, W. T.; Oates, A. S.; Huang, Tiao-Yuan |
