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Institution	Date	Title	Author
淡江大學	2004-05	The optimal testrail architecture for core-based soc testing	Rau, Jiann-chyi; Huang, Wang-tiao; Chien, Chih-lung
淡江大學	2003-08	A Datapath-Based Debugging Mechanism for RTL Description	Rau, Jiann-Chyi; Chang, Yi-Yuan; Huang, Wang-Tiao

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