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Institution	Date	Title	Author
元智大學	May-22	A 12–14.5-GHz 10.2-mW −249-dB FoM Fractional-N Subsampling PLL With a High-Linearity Phase Interpolator in 40-nm CMOS	Yan-Ting Chen; Pen-Jui Peng; Hungwen Lin
元智大學	May-16	低電壓差動訊號模式發射與接收電路	邵致翔; 周世芳; Hungwen Lin
元智大學	Jun-18	LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER	Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學	Jun-18	LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER	Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學	Jun-18	LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER	Hungwen Lin; Shih-Fang Jhou; Chih-Hsiang Shao
元智大學	Jun-18	LOW-VOLTAGE DIFFERENTIAL SIGNALING TRANSMITTER AND RECEIVER	Hungwen Lin; Shihfang Jhoh; Chihhsiang Shao
元智大學	Aug-22	A 100-Gb/s PAM-4 Voltage-Mode Transmitter With High-Resolution Unsegmented Three-Tap FFE in 40-nm CMOS	Yan-Ting Chen; Pen-Jui Peng; Hungwen Lin
元智大學	2023-07-17	A SSN reduction technique for single-ended I/O, parallel link system	Hungwen Lin; Chung-Yen Lin; Tzu-Yu Teng; Chi-Ting Ke
元智大學	2022-07-06	A Low Process Sensitivity inverter-based RX Analog Front-End Design	Tzu-Hao Lin; Hungwen Lin
元智大學	2021-09-15	A Buffer Circuit for the Interface of RF and Baseband System	Zhi-Sheng Zhang; Zhi-Yi Chen; Hungwen Lin
元智大學	2020/9/28	A Baseband All-Digital Clock and Data Recovery Circuit with A Limited Range Binary Search FSM	Jia-ken Li; Hungwen Lin
元智大學	2020/7/28	A 0.3V, 625Mbps LVDS Driver in 0.18um CMOS Technology	Hungwen Lin; Tzu-Hao Lin
元智大學	2019-08-06	A Buffer Circuit for the Interface of RF and Baseband System	Zhi-Sheng Zhang; Tzu-Hao Lin; Hungwen Lin
元智大學	2019-08-06	A Low-Area Programmable Low-Pass-Filter with Automatic -3dB Frequency Calibration	Zhi-Sheng Zhang; Tzu-Hao Lin; Hungwen Lin
元智大學	2018-08-07	A Baseband CDR circuit for Dedicated-Short-Range-Communications Systems	Jia-ken Li; Yong-Lin Chen; Hungwen Lin
元智大學	2018-08-07	A Tunable Low-Pass Filter with Wide Bandwidth-Range Using Mixed-Mode Controls	Zhi-Sheng Zhang; Jhu-Huel Yan; Hungwen Lin
元智大學	2016-10-23	A Passband Lock Loop Circuit System for Band Pass Filter	Jin-Yi Lin; Yung-Hsin Huang; Hungwen Lin
元智大學	2016-08-02	A 0.35V, 500Mbps Digitalized LVDS driver in 0.18m CMOS technology	Shi-Fung Zhou; Hungwen Lin
元智大學	2015-11-02	A Low-Area Digitalized Low-Pass-Filter with Programmable Active-RC Load	Hungwen Lin; Chien-Han Chuang
元智大學	2015-11-02	A Low-Area Digitalized Low-Pass-Filter with Programmable Active-RC Load	Hungwen Lin; Chien-Han Chuang
元智大學	2015-10-21	Heat Dissipation Improvement Design For QSFP Connector	Ming-Chun Hsu; Hungwen Lin
元智大學	2015-08-04	A Passband Calibration Circuit System for Channel Selection Filter	Jin-Yi Lin; Yung-Hsin Huang; Hungwen Lin
元智大學	2015-08-04	A 1.2V 3.5Gbps Digitalized LVDS driver in 0.18um CMOS technology	Jhih-Siang Shao; Shi-Fung Zhou; Hungwen Lin
元智大學	2015-08-04	A Low-Area Digitalized Low-Pass-Filter with Programmable Active-RC Load	Chien-Han Chuang; Jia-Ken Li; Hungwen Lin
元智大學	2014-11-03	An 10-Gb/s Pulse-Mode I/O for On-Chip 5-mm interconnect	Hungwen Lin; Guan-Ru Wu; Zhi-Xiang Shao; Yong-Hsin Huang
元智大學	2014-11-03	A Low-IF AGC Amplifier for DSRC Receiver	Hungwen Lin; Wu-Wei Lin; Chun-Yen Lin
元智大學	2014-08-03	A IF AGC AMPLIFIER FOR DSRC SYSTEM	Hungwen Lin; Wu-Wei Lin; Chun-Yen Lin
元智大學	2014-08-03	A BAND-PASS IF AGC AMPLIFIER FOR DSRC SYSTEM	Wu-Wei Lin; Hungwen Lin; Jia-Ken Li
元智大學	2014-08-03	AN ON-CHIP IMPULSE MODE INTERFACE CIRCUIT DESIGN	Hungwen Lin; Guan-Ru Wu; Zhi-Xiang Shao; Yong-Hsin Huang
元智大學	2014-04-28	A Low-Area Digitalized Channel Selection Filter for DSRC System	Hungwen Lin; Jin-Yi Lin; Min-Tai Chuang
元智大學	2013-08-05	A 40MHZ IF BAND PASS FILTER FOR DSRC SYSTEM	Hungwen Lin; Jin-Yi Lin; Min-Tai Chuang
元智大學	2013-08-05	All-Digital Resonant DCO with Inverter-based Tunable Active Inductor	Hungwen Lin; Min-Tai Chuang
元智大學	2012-08-07	A DLL-based FSK Demodulator for DSRC System with an Oscillator-based Delay Line	胡心麟; 林吳維; Hungwen Lin

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