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Taiwan Academic Institutional Repository >
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"hwang wei"
Showing items 31-40 of 202 (21 Page(s) Totally)
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| 國立交通大學 |
2017-04-21T06:49:03Z |
An All-Digital Power Management Unit with 90% Power Efficiency and ns-order Voltage Transition Time for DVS Operation in Low Power Sensing SoC Applications
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Wu, Chung-Shiang; Lin, Kai-Chun; Kuo, Yi-Ping; Chen, Po-Hung; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:57Z |
Polymer TSV Fabrication Scheme with Its Electrical and Reliability Test Vehicle
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Lee, Shih-Wei; Shih, Jian-Yu; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Chen, Kuan-Neng |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Recent Advances in ASIC-compatible Circuit Techniques for a SOC in Newly Emerging Application Areas: Invited Paper
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Dhong, Sang H.; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 16kB Tile-able SRAM Macro Prototype for an Operating Window of 4.8GHz at 1.12V VDD to 10 MHz at 0.5V in a 28-nm HKMG CMOS
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Kuo, Ming-Zhang; Hsieh, Henry; Dhong, Sang; Yang, Ping-Lin; Lin, Cheng-Chung; Tseng, Ryan; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 0.42V Vccmin ASIC-Compatible Pulse-Latch Solution as a Replacement for a Traditional Master-Slave Flip-Flop in a Digital SOC
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Dhong, Sang; Guo, Richard; Kuo, Ming-Zhang; Yang, Ping-Lin; Lin, Cheng-Chung; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:29Z |
Low Power Algorithm-Architecture Co-Design of Fast Independent Component Analysis (FICA) for Multi-Gas Sensor Applications
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Yang, Chieh-Chao; Huang, Po-Tsang; Huang, Chun-Ying; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:28Z |
All Digitally Controlled Linear Voltage Regulator with PMOS Strength Self-Calibration for Ripple Reduction
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Kuo, Yi-Ping; Huang, Po-Tsang; Wu, Chung-Shiang; Liang, Yu-Jie; Chuang, Ching-Te; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2016-03-28T08:17:35Z |
應用於物聯網資料存取之具能源效益高頻寬記憶體及加寬匯流排介面( II )
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黃威; Hwang Wei |
| 國立交通大學 |
2016-03-28T00:05:44Z |
Through-Silicon-Via-Based Double-Side Integrated Microsystem for Neural Sensing Applications
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Chang, Chih-Wei; Huang, Po-Tsang; Chou, Lei-Chun; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Lee, Yen-Chi; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming |
| 國立交通大學 |
2015-12-04T07:03:10Z |
MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTIVE READ PATH FOR LOW POWER OPERATION
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HWANG Wei; WANG Dao-Ping |
Showing items 31-40 of 202 (21 Page(s) Totally)
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