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"hwang wei"的相关文件
显示项目 156-202 / 202 (共5页)
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| 國立交通大學 |
2014-12-08T15:35:46Z |
Low Temperature (< 180 degrees C) Wafer-level and Chip-level In-to-Cu and Cu-to-Cu Bonding for 3D Integration
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Chien, Yu-San; Huang, Yan-Pin; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:35:46Z |
Multi-Layer Adaptive Power Management Architecture for TSV 3DIC Applications
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Chang, Ming-Hung; Hsieh, Wei-Chih; Wu, Pei-Chen; Chuang, Ching-Te; Chen, Kuan-Neng; Wang, Chen-Chao; Ting, Chun-Yen; Chen, Kua-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
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Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang |
| 國立交通大學 |
2014-12-08T15:35:44Z |
Near-/Sub-V-th Process, Voltage, and Temperature (PVT) Sensors with Dynamic Voltage Selection
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Chang, Ming-Hung; Lin, Shang-Yuan; Wu, Pei-Chen; Zakoretska, Olesya; Chuang, Ching-Te; Chen, Kuan-Neng; Wang, Chen-Chao; Chen, Kua-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:35:28Z |
Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors
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Wang, Dao-Ping; Lin, Hon-Jarn; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:35:19Z |
Low-Temperature Bonded Cu/In Interconnect With High Thermal Stability for 3-D Integration
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Chien, Yu-San; Huang, Yan-Pin; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chiu, Chi-Tsung; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:35:16Z |
Low Temperature (< 180 degrees C) Bonding for 3D Integration
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Huang, Yan-Pin; Tzeng, Ruoh-Ning; Chien, Yu-San; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chuang, Ching-Te; Hwang, Wei; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:35:05Z |
A TSV-Based Bio-Signal Package With mu-Probe Array
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Chou, Lei-Chun; Lee, Shih-Wei; Huang, Po-Tsang; Chang, Chih-Wei; Chiang, Cheng-Hao; Wu, Shang-Lin; Chuang, Ching-Te; Chiou, Jin-Chern; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:33:26Z |
Novel Cu-to-Cu Bonding With Ti Passivation at 180 degrees C in 3-D Integration
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Huang, Yan-Pin; Chien, Yu-San; Tzeng, Ruoh-Ning; Shy, Ming-Shaw; Lin, Teu-Hua; Chen, Kou-Hua; Chiu, Chi-Tsung; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:33:15Z |
Impacts of NBTI/PBTI on Timing Control Circuits and Degradation Tolerant Design in Nanoscale CMOS SRAM
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Yang, Hao-I.; Yang, Shyh-Chyi; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:09Z |
Impacts of NBTI/PBTI and Contact Resistance on Power-Gated SRAM With High-kappa Metal-Gate Devices
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Yang, Hao-I; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:31:08Z |
Adaptive Power Control Technique on Power-Gated Circuitries
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Hsieh, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:30:49Z |
Investigation of ICP Parameters for Smooth TSVs and Following Cu Plating Process in 3D Integration
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Chiang, Cheng-Hao; Hu, Yu-Chen; Chen, Kuo-Hua; Chiu, Chi-Tsung; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:30:49Z |
Micro-masking Removal of TSV and Cavity during ICP Etching Using Parameter Control in 3D and MEMS Integrations
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Hu, Yu-Chen; Chiang, Cheng-Hao; Chen, Kuo-Hua; Chiu, Chi-Tsung; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2014-12-08T15:30:06Z |
High-Performance 0.6V V-MIN 55nm 1.0Mb 6T SRAM with Adaptive BL Bleeder
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Yang, Hao-I; Lin, Yi-Wei; Hsia, Mao-Chih; Lin, Geng-Cing; Chang, Chi-Shin; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang |
| 國立交通大學 |
2014-12-08T15:30:05Z |
Substrate Noise Suppression Technique for Power Integrity of TSV 3D Integration
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Yang, Po-Jen; Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:29:40Z |
A 0.33-V, 500-kHz, 3.94-mu W 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist
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Lu, Chien-Yu; Tu, Ming-Hsien; Yang, Hao-I; Wu, Ya-Ping; Huang, Huan-Shun; Lin, Yuh-Jiun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:40Z |
TIMING CONTROL DEGRADATION AND NBTI/PBTI TOLERANT DESIGN FOR WRITE-REPLICA CIRCUIT IN NANOSCALE CMOS SRAM
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Yang, Shyh-Chyi; Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:25Z |
A MICRO-WATT MULTI-PORT REGISTER FILE WITH WIDE OPERATING VOLTAGE RANGE
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Yang, Shyh-Chyi; Yang, Hao-I; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:24Z |
Impacts of Contact Resistance and NBTI/PBTI on SRAM with High-kappa Metal-Gate Devices
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:19Z |
Impact of Gate-Oxide Breakdown on Power-Gated SRAM
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:05Z |
On-chip DC-DC converter with frequency detector for dynamic voltage scaling technology
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Yang, Jen-Wei; Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:05Z |
Low power pre-comparison scheme for NOR-type 10T content addressable memory
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Huang, Po-Tsang; Chang, Wei-Keng; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:25:05Z |
A low-power reconfigurable mixed-radix FFT/IFFT processor
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Lai, Chi-Chen; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:51Z |
2-l.evel FIFO architecture design for switch fabrics in network-on-chip
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Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:51Z |
A 1.7mW all digital phase-locked loop with new gain generator and low power DCO
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Chao, Tzu-Chiang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:49Z |
A noise-tolerant matchline scheme with XOR-based conditional keeper for energy-efficient TCAM
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Hua, Chung-Hsien; Peng, Chi-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:05Z |
Design and Iso-Area V-min Analysis of 9T Subthreshold SRAM With Bit-Interleaving Scheme in 65-nm CMOS
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Chang, Ming-Hung; Chiu, Yi-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:36Z |
Impacts of NBTI and PBTI on Power-Gated SRAM with High-k Metal-Gate Devices
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:15Z |
An Adaptive Congestion-Aware Routing Algorithm for Mesh Network-on-Chip Platform
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Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:13Z |
A 2.1-mu W 0.3V-1.0V Wide Locking Range Multiphase DLL Using Self-Estimated SAR Algorithm
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Chang, Yi-Ming; Chang, Ming-Hung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:12Z |
All Digital Linear Voltage Regulator for Super- to Near-Threshold Operation
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Hsieh, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:45Z |
Logical Effort Models with Voltage and Temperature Extensions in Super-/Near-/Sub-threshold Regions
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Chang, Ming-Hung; Hsieh, Chung-Ying; Chen, Mei-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:19Z |
On-Demand Memory Sub-System for Multi-Core SaCs
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Huang, Po-Tsang; Chang, Yung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:19Z |
An Energy-Efficient 10T SRAM-based FIFO Memory Operating in Near-/Sub-threshold Regions
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Du, Wei-Hung; Chang, Ming-Hung; Yang, Hao-Yi; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:19Z |
A High-Performance Low V(MIN) 55nm 512Kb Disturb-Free 8T SRAM with Adaptive VVSS Control
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Yang, Hao-I; Yang, Shih-Chi; Hsia, Mao-Chih; Lin, Yung-Wei; Lin, Yi-Wei; Chen, Chien-Hen; Chang, Chi-Shin; Lin, Geng-Cing; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang |
| 國立交通大學 |
2014-12-08T15:20:35Z |
Two-Level FIFO Buffer Design for Routers in On-Chip Interconnection Networks
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Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:20:11Z |
Impacts of NBTI on SRAM Array with Power Gating Structure
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:16:37Z |
A 256x128 energy-efficient TCAM with novel low power schemes
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Huang, Po-Tsang; Chang, Shu-Wei; Liu, Wen-Yen; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:16:36Z |
Power gating technique for embedded pseudo SRAM
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Cheng, Ching-Yun; Chang, Ming-Hung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:12:41Z |
Low power and reliable interconnection with self-corrected green coding scheme for network-on-chip
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Huang, Po-Tsang; Fang, Wei-Li; Wang, Yin-Ling; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:11:51Z |
Design of memory sub-system in H.264/AVC decoder
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Li, Chih-Hung; Chang, Chang-Hsuan; Peng, Wen-Hsiao; Hwang, Wei; Chiang, Tihao |
| 國立交通大學 |
2014-12-08T15:10:11Z |
A flexible two-layer external memory management for H.264/AVC decoder
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Chang, Chang-Hsuan; Chang, Ming-Hung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:10:09Z |
A 65nm low power 2T1D embedded DRAM with leakage current reduction
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Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:09:30Z |
Low power on-chip current monitoring medium-grained adaptive voltage control
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Hsieh, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:09:28Z |
A 1.9mW portable ADPLL-based frequency synthesizer for high speed clock generation
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Chang, Ming-Hung; Yang, Zong-Xi; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:02:14Z |
A controllable low-power dual-port embedded SRAM for DSP processor
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Yang, Hao-I; Chang, Ming-Hung; Lin, Tay-Jyi; Ou, Shih-Hao; Deng, Siang-Sen; Liu, Chih-Wei; Hwang, Wei |
显示项目 156-202 / 202 (共5页)
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