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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"hwang wei"的相關文件
顯示項目 181-190 / 202 (共21頁)
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| 國立交通大學 |
2014-12-08T15:24:51Z |
A 1.7mW all digital phase-locked loop with new gain generator and low power DCO
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Chao, Tzu-Chiang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:49Z |
A noise-tolerant matchline scheme with XOR-based conditional keeper for energy-efficient TCAM
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Hua, Chung-Hsien; Peng, Chi-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:24:05Z |
Design and Iso-Area V-min Analysis of 9T Subthreshold SRAM With Bit-Interleaving Scheme in 65-nm CMOS
|
Chang, Ming-Hung; Chiu, Yi-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:36Z |
Impacts of NBTI and PBTI on Power-Gated SRAM with High-k Metal-Gate Devices
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Yang, Hao-I; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:15Z |
An Adaptive Congestion-Aware Routing Algorithm for Mesh Network-on-Chip Platform
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Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:13Z |
A 2.1-mu W 0.3V-1.0V Wide Locking Range Multiphase DLL Using Self-Estimated SAR Algorithm
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Chang, Yi-Ming; Chang, Ming-Hung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:23:12Z |
All Digital Linear Voltage Regulator for Super- to Near-Threshold Operation
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Hsieh, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:45Z |
Logical Effort Models with Voltage and Temperature Extensions in Super-/Near-/Sub-threshold Regions
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Chang, Ming-Hung; Hsieh, Chung-Ying; Chen, Mei-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:19Z |
On-Demand Memory Sub-System for Multi-Core SaCs
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Huang, Po-Tsang; Chang, Yung; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:21:19Z |
An Energy-Efficient 10T SRAM-based FIFO Memory Operating in Near-/Sub-threshold Regions
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Du, Wei-Hung; Chang, Ming-Hung; Yang, Hao-Yi; Hwang, Wei |
顯示項目 181-190 / 202 (共21頁)
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