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"hwang wei"的相關文件
顯示項目 21-45 / 202 (共9頁)
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| 國立交通大學 |
2017-04-21T06:56:36Z |
Digital Buck Converter With Switching Loss Reduction Scheme for Light Load Efficiency Enhancement
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Wu, Chung-Shiang; Lee, Hui-Hsuan; Chen, Po-Hung; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:50:15Z |
Integration of Neural Sensing Microsystem with TSV-embedded Dissolvable mu-Needles Array, Biocompatible Flexible Interposer, and Neural Recording Circuits
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Huang, Yu-Chieh; Hu, Yu-Chen; Huang, Po-Tsang; Wu, Shang-Lin; You, Yan-Huei; Chen, Jr-Ming; Huang, Yan-Yu; Chang, Hsiao-Chun; Lin, Yen-Han; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chuang, Ching-Te; Chiou, Jin-Chern; Chen, Kuan-Neng |
| 國立交通大學 |
2017-04-21T06:50:10Z |
Energy-Efficient Gas Recognition System with Event-Driven Power Control
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Huang, Chun-Ying; Huang, Po-Tsang; Yang, Chih-Chao; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:50:07Z |
An Ultra-High-Density 256-channel/25mm(2) Neural Sensing Microsystem using TSV-embedded Neural Probes
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Huang, Yu-Chieh; Huang, Po-Tsang; Wu, Shang-Lin; Hui, Yu-Chen; You, Yan-Huei; Chen, Jr-Ming; Huang, Yan-Yu; Chang, Hsiao-Chun; Lin, Yen-Han; Duann, Jeng-Ren; Chiu, Tzai-Wen; Hwang, Wei; Chen, Kuan-Neng; Chuang, Ching-Te; Chiou, Jin-Chern |
| 國立交通大學 |
2017-04-21T06:49:59Z |
High Efficiency Power Management System for Solar Energy Harvesting Applications
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Chang, Ming-Hung; Wu, Jung-Yi; Hsieh, Wei-Chih; Lin, Shang-Yuan; Liang, You-Wei; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:42Z |
0.339fJ/bit/search Energy-Efficient TCAM Macro Design in 40nm LP CMOS
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Huang, Po-Tsang; Lai, Shu-Lin; Chuang, Ching-Te; Hwang, Wei; Huang, Jason; Hu, Angelo; Kan, Paul; Jia, Michael; Lv, Kimi; Zhang, Bright |
| 國立交通大學 |
2017-04-21T06:49:42Z |
A low-power low-swing single-ended multi-port SRAM
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Yang, Hao-, I; Chang, Ming-Hung; Lai, Ssu-Yun; Wang, Hsiang-Fei; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:16Z |
Custom 6-R, 2-or 4-W Multi-Port Register Files in an ASIC SOC with a DVFS Window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS Technology
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Hsieh, Henry; Dhong, Sang H.; Lin, Cheng-Chung; Kuo, Ming-Zhang; Tseng, Kuo-Feng; Yang, Ping-Lin; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:05Z |
Multiple Output Switched Capacitor DC-DC Converter with Capacitor Sharing for Sensor-Fusion Platforms
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Liang, Yu-Jie; Chen, Po-Ilung; Lu, Hung-Pin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:05Z |
28nm Ultra-Low Power Near-/Sub- threshold First-In-First-Out (FIFO) Memory for Multi-Bio-Signal Sensing Platforms
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Hsu, Wei-Shen; Huang, Po-Tsang; Wu, Shang-Lin; Chuang, Ching-Te; Hwang, Wei; Tu, Ming-Hsien; Yin, Ming-Yu |
| 國立交通大學 |
2017-04-21T06:49:03Z |
An All-Digital Power Management Unit with 90% Power Efficiency and ns-order Voltage Transition Time for DVS Operation in Low Power Sensing SoC Applications
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Wu, Chung-Shiang; Lin, Kai-Chun; Kuo, Yi-Ping; Chen, Po-Hung; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:57Z |
Polymer TSV Fabrication Scheme with Its Electrical and Reliability Test Vehicle
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Lee, Shih-Wei; Shih, Jian-Yu; Chuang, Ching-Te; Hwang, Wei; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Chen, Kuan-Neng |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Recent Advances in ASIC-compatible Circuit Techniques for a SOC in Newly Emerging Application Areas: Invited Paper
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Dhong, Sang H.; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 16kB Tile-able SRAM Macro Prototype for an Operating Window of 4.8GHz at 1.12V VDD to 10 MHz at 0.5V in a 28-nm HKMG CMOS
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Kuo, Ming-Zhang; Hsieh, Henry; Dhong, Sang; Yang, Ping-Lin; Lin, Cheng-Chung; Tseng, Ryan; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 0.42V Vccmin ASIC-Compatible Pulse-Latch Solution as a Replacement for a Traditional Master-Slave Flip-Flop in a Digital SOC
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Dhong, Sang; Guo, Richard; Kuo, Ming-Zhang; Yang, Ping-Lin; Lin, Cheng-Chung; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:29Z |
Low Power Algorithm-Architecture Co-Design of Fast Independent Component Analysis (FICA) for Multi-Gas Sensor Applications
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Yang, Chieh-Chao; Huang, Po-Tsang; Huang, Chun-Ying; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:28Z |
All Digitally Controlled Linear Voltage Regulator with PMOS Strength Self-Calibration for Ripple Reduction
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Kuo, Yi-Ping; Huang, Po-Tsang; Wu, Chung-Shiang; Liang, Yu-Jie; Chuang, Ching-Te; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2016-03-28T08:17:35Z |
應用於物聯網資料存取之具能源效益高頻寬記憶體及加寬匯流排介面( II )
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黃威; Hwang Wei |
| 國立交通大學 |
2016-03-28T00:05:44Z |
Through-Silicon-Via-Based Double-Side Integrated Microsystem for Neural Sensing Applications
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Chang, Chih-Wei; Huang, Po-Tsang; Chou, Lei-Chun; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Lee, Yen-Chi; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming |
| 國立交通大學 |
2015-12-04T07:03:10Z |
MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTIVE READ PATH FOR LOW POWER OPERATION
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HWANG Wei; WANG Dao-Ping |
| 國立交通大學 |
2015-12-02T03:00:57Z |
Integrated Microprobe Array and CMOS MEMS by TSV Technology for Bio- Signal Recording Application
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Chou, Lei-Chun; Lee, Shih-Wei; Huang, Po-Tsang; Chang, Chih-Wei; Wu, Shang-Lin; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2015-12-02T03:00:54Z |
A TSV-Based Heterogeneous Integrated Neural-Signal Recording Device with Microprobe Array
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Chou, Lei-Chun; Lee, Shih-Wei; Cheng, Chuan-An; Huang, Po-Tsang; Chang, Chih-Wei; Chiang, Cheng-Hao; Wu, Shang-Lin; Chuang, Ching-Te; Chiou, Jin-Chern; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2015-12-02T03:00:50Z |
Energy-Efficient Low-Noise 16-Channel Analog-Front-End Circuit for Bio-potential Acquisition
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Wu, Shang-Lin; Huang, Po-Tsang; Huang, Teng-Chieh; Chen, Kuan-Neng; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:06:28Z |
實現在40奈米製程下可應用於IP位址搜尋之高能源效益三態內容可定址記憶體電路設計
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賴淑琳; Lai, Shu-Lin; 黃威; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:04:16Z |
實現在40奈米製程下可操縱在低電壓的四讀四寫多執行序暫存器叢集設計
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林弘璋; Lin, Hon-Jarn; 黃威; 莊景德; Hwang, Wei; Chuang, Ching-Te |
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