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教育部委託研究計畫      計畫執行:國立臺灣大學圖書館
 
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機構 日期 題名 作者
國立交通大學 2017-04-21T06:48:29Z Low Power Algorithm-Architecture Co-Design of Fast Independent Component Analysis (FICA) for Multi-Gas Sensor Applications Yang, Chieh-Chao; Huang, Po-Tsang; Huang, Chun-Ying; Chuang, Ching-Te; Hwang, Wei
國立交通大學 2017-04-21T06:48:28Z All Digitally Controlled Linear Voltage Regulator with PMOS Strength Self-Calibration for Ripple Reduction Kuo, Yi-Ping; Huang, Po-Tsang; Wu, Chung-Shiang; Liang, Yu-Jie; Chuang, Ching-Te; Chu, Yuan-Hua; Hwang, Wei
國立交通大學 2016-03-28T08:17:35Z 應用於物聯網資料存取之具能源效益高頻寬記憶體及加寬匯流排介面( II ) 黃威; Hwang Wei
國立交通大學 2016-03-28T00:05:44Z Through-Silicon-Via-Based Double-Side Integrated Microsystem for Neural Sensing Applications Chang, Chih-Wei; Huang, Po-Tsang; Chou, Lei-Chun; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Lee, Yen-Chi; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming
國立交通大學 2015-12-04T07:03:10Z MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTIVE READ PATH FOR LOW POWER OPERATION HWANG Wei; WANG Dao-Ping
國立交通大學 2015-12-02T03:00:57Z Integrated Microprobe Array and CMOS MEMS by TSV Technology for Bio- Signal Recording Application Chou, Lei-Chun; Lee, Shih-Wei; Huang, Po-Tsang; Chang, Chih-Wei; Wu, Shang-Lin; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2015-12-02T03:00:54Z A TSV-Based Heterogeneous Integrated Neural-Signal Recording Device with Microprobe Array Chou, Lei-Chun; Lee, Shih-Wei; Cheng, Chuan-An; Huang, Po-Tsang; Chang, Chih-Wei; Chiang, Cheng-Hao; Wu, Shang-Lin; Chuang, Ching-Te; Chiou, Jin-Chern; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng
國立交通大學 2015-12-02T03:00:50Z Energy-Efficient Low-Noise 16-Channel Analog-Front-End Circuit for Bio-potential Acquisition Wu, Shang-Lin; Huang, Po-Tsang; Huang, Teng-Chieh; Chen, Kuan-Neng; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei
國立交通大學 2015-11-26T01:06:28Z 實現在40奈米製程下可應用於IP位址搜尋之高能源效益三態內容可定址記憶體電路設計 賴淑琳; Lai, Shu-Lin; 黃威; Hwang, Wei
國立交通大學 2015-11-26T01:04:16Z 實現在40奈米製程下可操縱在低電壓的四讀四寫多執行序暫存器叢集設計 林弘璋; Lin, Hon-Jarn; 黃威; 莊景德; Hwang, Wei; Chuang, Ching-Te

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