| 國立交通大學 |
2017-04-21T06:48:29Z |
Low Power Algorithm-Architecture Co-Design of Fast Independent Component Analysis (FICA) for Multi-Gas Sensor Applications
|
Yang, Chieh-Chao; Huang, Po-Tsang; Huang, Chun-Ying; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:48:28Z |
All Digitally Controlled Linear Voltage Regulator with PMOS Strength Self-Calibration for Ripple Reduction
|
Kuo, Yi-Ping; Huang, Po-Tsang; Wu, Chung-Shiang; Liang, Yu-Jie; Chuang, Ching-Te; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2016-03-28T08:17:35Z |
應用於物聯網資料存取之具能源效益高頻寬記憶體及加寬匯流排介面( II )
|
黃威; Hwang Wei |
| 國立交通大學 |
2016-03-28T00:05:44Z |
Through-Silicon-Via-Based Double-Side Integrated Microsystem for Neural Sensing Applications
|
Chang, Chih-Wei; Huang, Po-Tsang; Chou, Lei-Chun; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Lee, Yen-Chi; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming |
| 國立交通大學 |
2015-12-04T07:03:10Z |
MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTIVE READ PATH FOR LOW POWER OPERATION
|
HWANG Wei; WANG Dao-Ping |
| 國立交通大學 |
2015-12-02T03:00:57Z |
Integrated Microprobe Array and CMOS MEMS by TSV Technology for Bio- Signal Recording Application
|
Chou, Lei-Chun; Lee, Shih-Wei; Huang, Po-Tsang; Chang, Chih-Wei; Wu, Shang-Lin; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2015-12-02T03:00:54Z |
A TSV-Based Heterogeneous Integrated Neural-Signal Recording Device with Microprobe Array
|
Chou, Lei-Chun; Lee, Shih-Wei; Cheng, Chuan-An; Huang, Po-Tsang; Chang, Chih-Wei; Chiang, Cheng-Hao; Wu, Shang-Lin; Chuang, Ching-Te; Chiou, Jin-Chern; Hwang, Wei; Wu, Chung-Hsi; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chen, Kuan-Neng |
| 國立交通大學 |
2015-12-02T03:00:50Z |
Energy-Efficient Low-Noise 16-Channel Analog-Front-End Circuit for Bio-potential Acquisition
|
Wu, Shang-Lin; Huang, Po-Tsang; Huang, Teng-Chieh; Chen, Kuan-Neng; Chiou, Jin-Chern; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:06:28Z |
實現在40奈米製程下可應用於IP位址搜尋之高能源效益三態內容可定址記憶體電路設計
|
賴淑琳; Lai, Shu-Lin; 黃威; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:04:16Z |
實現在40奈米製程下可操縱在低電壓的四讀四寫多執行序暫存器叢集設計
|
林弘璋; Lin, Hon-Jarn; 黃威; 莊景德; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2015-11-26T01:02:48Z |
應用於異質周遭感測器之物聯網路由器的動態資料管理系統
|
杜易霖; Tu, Yi-Lin; 黃威; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:02:09Z |
28 奈米高介電係數金屬閘極製程操縱在 近/次臨界電壓之256kb 6T 靜態隨機存取記憶體
|
李光宇; Li, Kuang-Yu; 莊景德; 黃威; Chuang,Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:02:09Z |
應用於多感測器平台之多輸出具電容共享之切換式電容電源轉換器
|
梁宇傑; Liang, Yu-Jie; 黃威; Hwang, Wei |
| 國立交通大學 |
2015-11-26T01:02:09Z |
應用於高密度神經感測之低雜訊截波穩定型之開迴路神經訊號放大器
|
黃硯榆; Huang, Yan-Yu; 莊景德; 黃威; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-11-26T00:57:08Z |
事件驅動能源控制之高能源效率氣體辨識系統
|
黃羣穎; Huang, Chun-Ying; 黃威; 莊景德; Hwang, Wei; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
|
Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2015-07-21T11:20:52Z |
2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications
|
Huang, Po-Tsang; Wu, Shang-Lin; Huang, Yu-Chieh; Chou, Lei-Chun; Huang, Teng-Chieh; Wang, Tang-Hsuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:30Z |
2.5D Heterogeneously Integrated Bio-Sensing Microsystem for Multi-Channel Neural-Sensing Applications
|
Huang, Po-Tsang; Chou, Lei-Chun; Huang, Teng-Chieh; Wu, Shang-Lin; Wang, Tang-Shuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chen, Kuan-Neng; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Cheng, Ming-Hsiang; Lin, Yueh-Lung; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:17Z |
Energy-Efficient Configurable Discrete Wavelet Transform for Neural Sensing Applications
|
Wang, Tang-Hsuan; Huang, Po-Tsang; Chen, Kuan-Neng; Chiou, Jin-Chem; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
|
Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A DUAL-EDGED TRIGGERED EXPLICIT-PULSED LEVEL CONVERTING FLIP-FLOP WITH A WIDE OPERATION RANGE
|
Chen, Mei-Wei; Chang, Ming-Hung; Wu, Pei-Chen; Kuo, Yi-Ping; Yang, Chun-Lin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:29:00Z |
A double-sided, single-chip integration scheme using through-silicon-via for neural sensing applications
|
Chang, Chih-Wei; Chou, Lei-Chun; Huang, Po-Tsang; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chiou, Jin-Chern |
| 國立交通大學 |
2014-12-16T06:16:13Z |
Power gating structure having data retention and intermediate modes
|
Hua, Chung-Hsien; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
XOR-based conditional keeper and an architecture implementing its application to match lines
|
Hua, Chung-Hsien; Peng, Chi-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
Asynchronous first-in first-out cell
|
Chu, Yeh-Lin; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:05Z |
Clock switching circuit
|
Wu, Jian-Hua; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:57Z |
Pipeline-based reconfigurable mixed-radix FFT processor
|
Lai, Chi-Chen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
BUTTERFLY MATCH-LINE STRUCTURE AND SEARCH METHOD IMPLEMENTED THEREBY
|
Huang, Po-Tsang; Hwang, Wei; Chang, Shu-Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
STORED DON'T-CARE BASED HIERARCHICAL SEARCH-LINE SCHEME
|
CHANG, Shu-Wei; Hwang, Wei; Chang, Ming-Hung; Huang, Po-Tsang |
| 國立交通大學 |
2014-12-16T06:15:49Z |
SELF-AWARE ADAPTIVE POWER CONTROL SYSTEM AND A METHOD FOR DETERMINING THE CIRCUIT STATE
|
HSIEH, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:48Z |
Leakage current cut-off device for ternary content addressable memory
|
Huang, Po-Tsang; Liu, Wen-Yen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:48Z |
Super leakage current cut-off device for ternary content addressable memory
|
Huang, Po-Tsang; Liu, Wen-Yen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:33Z |
Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
|
Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:25Z |
DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELL
|
Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:15:23Z |
Charge Pump
|
WU Chun-Yi; HSIEH Wei-Chih; CHANG Ming-Hung; HWANG Wei |
| 國立交通大學 |
2014-12-16T06:15:23Z |
SOLAR POWER MANAGEMENT SYSTEM
|
WU CHUN-YI; HSIEH WEI-CHIH; HWANG WEI |
| 國立交通大學 |
2014-12-16T06:15:18Z |
LOW POWER STATIC RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:18Z |
STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:17Z |
DATA-AWARE DYNAMIC SUPPLY RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng |
| 國立交通大學 |
2014-12-16T06:15:16Z |
FULLY-ON-CHIP TEMPERATURE, PROCESS, AND VOLTAGE SENSOR SYSTEM
|
CHEN Shi-Wen; CHANG Ming-Hung; HSIEH Wei-Chih; HWANG Wei |
| 國立交通大學 |
2014-12-16T06:15:14Z |
GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE
|
YANG Hao-I; Chuang Ching-Te; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:09Z |
METHOD FOR BUFFERING CLOCK SKEW BY USING A LOGICAL EFFORT
|
Hsieh Chung-Ying; Chang Ming-Hung; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:06Z |
STATIC RANDOM ACCESS MEMORY CELL AND METHOD OF OPERATING THE SAME
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:04Z |
DUAL-PORT SUBTHRESHOLD SRAM CELL
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:01Z |
SYSTEM AND METHOD FOR ALLOCATING CACHE MEMORY
|
CHANG Yung; Huang Po-Tsang; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:01Z |
METHOD AND DEVICE FOR DECODING A SCALABLE VIDEO SIGNAL UTILIZING AN INTER-LAYER PREDICTION
|
CHANG YUNG; HUANG PO-TSANG; HWANG WEI; CHEN YU-CHEN; LI GWO-LONG; CHANG TIAN-SHEUAN |
| 國立交通大學 |
2014-12-16T06:14:56Z |
SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
|
CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:56Z |
Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability
|
Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:49Z |
STATIC RANDOM ACCESS MEMORY WITH RIPPLE BIT LINES/SEARCH LINES FOR IMROVING CURRENT LEAKAGE/VARIATION TOLERANCE AND DENSITY/PERFORMANCE
|
CHUANG Ching-Te; YANG Hao-I; LU Chien-Yu; CHEN Chien-Hen; CHANG Chi-Shin; HUANG Po-Tsang; LAI Shu-Lin; HWANG Wei; JOU Shyh-Jye; TU Ming-Hsien |
| 國立交通大學 |
2014-12-16T06:14:46Z |
TEN-TRANSISTOR DUAL-PORT SRAM WITH SHARED BIT-LINE ARCHITECTURE
|
HWANG Wei; WANG Dao-Ping |
