| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
|
Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2015-07-21T11:20:52Z |
2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications
|
Huang, Po-Tsang; Wu, Shang-Lin; Huang, Yu-Chieh; Chou, Lei-Chun; Huang, Teng-Chieh; Wang, Tang-Hsuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Chiou, Jin-Chern; Hwang, Wei; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:30Z |
2.5D Heterogeneously Integrated Bio-Sensing Microsystem for Multi-Channel Neural-Sensing Applications
|
Huang, Po-Tsang; Chou, Lei-Chun; Huang, Teng-Chieh; Wu, Shang-Lin; Wang, Tang-Shuan; Lin, Yu-Rou; Cheng, Chuan-An; Shen, Wen-Wei; Chen, Kuan-Neng; Chiou, Jin-Chern; Chuang, Ching-Te; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Cheng, Ming-Hsiang; Lin, Yueh-Lung; Tong, Ho-Ming |
| 國立交通大學 |
2015-07-21T08:31:17Z |
Energy-Efficient Configurable Discrete Wavelet Transform for Neural Sensing Applications
|
Wang, Tang-Hsuan; Huang, Po-Tsang; Chen, Kuan-Neng; Chiou, Jin-Chem; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chuang, Ching-Te; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
|
Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A DUAL-EDGED TRIGGERED EXPLICIT-PULSED LEVEL CONVERTING FLIP-FLOP WITH A WIDE OPERATION RANGE
|
Chen, Mei-Wei; Chang, Ming-Hung; Wu, Pei-Chen; Kuo, Yi-Ping; Yang, Chun-Lin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:29:00Z |
A double-sided, single-chip integration scheme using through-silicon-via for neural sensing applications
|
Chang, Chih-Wei; Chou, Lei-Chun; Huang, Po-Tsang; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chiou, Jin-Chern |
| 國立交通大學 |
2014-12-16T06:16:13Z |
Power gating structure having data retention and intermediate modes
|
Hua, Chung-Hsien; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
XOR-based conditional keeper and an architecture implementing its application to match lines
|
Hua, Chung-Hsien; Peng, Chi-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
Asynchronous first-in first-out cell
|
Chu, Yeh-Lin; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:05Z |
Clock switching circuit
|
Wu, Jian-Hua; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:57Z |
Pipeline-based reconfigurable mixed-radix FFT processor
|
Lai, Chi-Chen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
BUTTERFLY MATCH-LINE STRUCTURE AND SEARCH METHOD IMPLEMENTED THEREBY
|
Huang, Po-Tsang; Hwang, Wei; Chang, Shu-Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
STORED DON'T-CARE BASED HIERARCHICAL SEARCH-LINE SCHEME
|
CHANG, Shu-Wei; Hwang, Wei; Chang, Ming-Hung; Huang, Po-Tsang |
| 國立交通大學 |
2014-12-16T06:15:49Z |
SELF-AWARE ADAPTIVE POWER CONTROL SYSTEM AND A METHOD FOR DETERMINING THE CIRCUIT STATE
|
HSIEH, Wei-Chih; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:48Z |
Leakage current cut-off device for ternary content addressable memory
|
Huang, Po-Tsang; Liu, Wen-Yen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:48Z |
Super leakage current cut-off device for ternary content addressable memory
|
Huang, Po-Tsang; Liu, Wen-Yen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:33Z |
Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
|
Chang, Mu-Tien; Huang, Po-Tsang; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:25Z |
DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELL
|
Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:15:23Z |
Charge Pump
|
WU Chun-Yi; HSIEH Wei-Chih; CHANG Ming-Hung; HWANG Wei |
| 國立交通大學 |
2014-12-16T06:15:23Z |
SOLAR POWER MANAGEMENT SYSTEM
|
WU CHUN-YI; HSIEH WEI-CHIH; HWANG WEI |
| 國立交通大學 |
2014-12-16T06:15:18Z |
LOW POWER STATIC RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:18Z |
STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:15:17Z |
DATA-AWARE DYNAMIC SUPPLY RANDOM ACCESS MEMORY
|
Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng |
| 國立交通大學 |
2014-12-16T06:15:16Z |
FULLY-ON-CHIP TEMPERATURE, PROCESS, AND VOLTAGE SENSOR SYSTEM
|
CHEN Shi-Wen; CHANG Ming-Hung; HSIEH Wei-Chih; HWANG Wei |
| 國立交通大學 |
2014-12-16T06:15:14Z |
GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE
|
YANG Hao-I; Chuang Ching-Te; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:09Z |
METHOD FOR BUFFERING CLOCK SKEW BY USING A LOGICAL EFFORT
|
Hsieh Chung-Ying; Chang Ming-Hung; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:06Z |
STATIC RANDOM ACCESS MEMORY CELL AND METHOD OF OPERATING THE SAME
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:04Z |
DUAL-PORT SUBTHRESHOLD SRAM CELL
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:01Z |
SYSTEM AND METHOD FOR ALLOCATING CACHE MEMORY
|
CHANG Yung; Huang Po-Tsang; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:15:01Z |
METHOD AND DEVICE FOR DECODING A SCALABLE VIDEO SIGNAL UTILIZING AN INTER-LAYER PREDICTION
|
CHANG YUNG; HUANG PO-TSANG; HWANG WEI; CHEN YU-CHEN; LI GWO-LONG; CHANG TIAN-SHEUAN |
| 國立交通大學 |
2014-12-16T06:14:56Z |
SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
|
CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:56Z |
Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability
|
Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:49Z |
STATIC RANDOM ACCESS MEMORY WITH RIPPLE BIT LINES/SEARCH LINES FOR IMROVING CURRENT LEAKAGE/VARIATION TOLERANCE AND DENSITY/PERFORMANCE
|
CHUANG Ching-Te; YANG Hao-I; LU Chien-Yu; CHEN Chien-Hen; CHANG Chi-Shin; HUANG Po-Tsang; LAI Shu-Lin; HWANG Wei; JOU Shyh-Jye; TU Ming-Hsien |
| 國立交通大學 |
2014-12-16T06:14:46Z |
TEN-TRANSISTOR DUAL-PORT SRAM WITH SHARED BIT-LINE ARCHITECTURE
|
HWANG Wei; WANG Dao-Ping |
| 國立交通大學 |
2014-12-16T06:14:17Z |
Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
|
Chang Mu-Tien; Huang Po-Tsang; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:16Z |
Charge pump
|
Wu Chun-Yi; Hsieh Wei-Chih; Chang Ming-Hung; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:15Z |
Self-aware adaptive power control system and a method for determining the circuit state
|
Hseih Wei-Chih; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:12Z |
Programmable clock generator used in dynamic-voltage-and-frequency-scaling (DVFS) operated in sub- and near- threshold region
|
Hsieh Chung-Ying; Chang Ming-Hung; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:10Z |
Solar power management system
|
Wu Chun-Yi; Hsieh Wei-Chih; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:10Z |
Disturb-free static random access memory cell
|
Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:14:08Z |
Static random access memory with data controlled power supply
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:14:07Z |
Data-aware dynamic supply random access memory
|
Chuang Ching-Te; Yang Hao-I; Lin Yi-Wei; Hwang Wei; Shih Wei-Chiang; Chen Chia-Cheng |
| 國立交通大學 |
2014-12-16T06:14:04Z |
Gate oxide breakdown-withstanding power switch structure
|
Yang Hao-I; Chuang Ching-Te; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:03Z |
Fully-on-chip temperature, process, and voltage sensor system
|
Chen Shi-Wen; Chang Ming-Hung; Hsieh Wei-Chih; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:01Z |
Static random access memory cell and method of operating the same
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:14:00Z |
Method for buffering clock skew by using a logical effort
|
Hsieh Chung-Ying; Chang Ming-Hung; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:13:59Z |
Dual-port subthreshold SRAM cell
|
Chiu Yi-Te; Chang Ming-Hung; Yang Hao-I; Hwang Wei |
| 國立交通大學 |
2014-12-16T06:13:54Z |
Low power static random access memory
|
Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Hwang Wei; Chen Chia-Cheng; Shih Wei-Chiang |
| 國立交通大學 |
2014-12-16T06:13:50Z |
Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performance
|
Chuang Ching-Te; Yang Hao-I; Lu Chien-Yu; Chen Chien-Hen; Chang Chi-Shin; Huang Po-Tsang; Lai Shu-Lin; Hwang Wei; Jou Shyh-Jye; Tu Ming-Hsien |
