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Taiwan Academic Institutional Repository >
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"hwang wei"
Showing items 56-65 of 202 (21 Page(s) Totally)
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| 國立交通大學 |
2015-07-21T08:31:00Z |
A DUAL-EDGED TRIGGERED EXPLICIT-PULSED LEVEL CONVERTING FLIP-FLOP WITH A WIDE OPERATION RANGE
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Chen, Mei-Wei; Chang, Ming-Hung; Wu, Pei-Chen; Kuo, Yi-Ping; Yang, Chun-Lin; Chu, Yuan-Hua; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:29:00Z |
A double-sided, single-chip integration scheme using through-silicon-via for neural sensing applications
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Chang, Chih-Wei; Chou, Lei-Chun; Huang, Po-Tsang; Wu, Shang-Lin; Lee, Shih-Wei; Chuang, Ching-Te; Chen, Kuan-Neng; Hwang, Wei; Chen, Kuo-Hua; Chiu, Chi-Tsung; Tong, Ho-Ming; Chiou, Jin-Chern |
| 國立交通大學 |
2014-12-16T06:16:13Z |
Power gating structure having data retention and intermediate modes
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Hua, Chung-Hsien; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
XOR-based conditional keeper and an architecture implementing its application to match lines
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Hua, Chung-Hsien; Peng, Chi-Wei; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:06Z |
Asynchronous first-in first-out cell
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Chu, Yeh-Lin; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:16:05Z |
Clock switching circuit
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Wu, Jian-Hua; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:57Z |
Pipeline-based reconfigurable mixed-radix FFT processor
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Lai, Chi-Chen; Hwang, Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
BUTTERFLY MATCH-LINE STRUCTURE AND SEARCH METHOD IMPLEMENTED THEREBY
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Huang, Po-Tsang; Hwang, Wei; Chang, Shu-Wei |
| 國立交通大學 |
2014-12-16T06:15:56Z |
STORED DON'T-CARE BASED HIERARCHICAL SEARCH-LINE SCHEME
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CHANG, Shu-Wei; Hwang, Wei; Chang, Ming-Hung; Huang, Po-Tsang |
| 國立交通大學 |
2014-12-16T06:15:49Z |
SELF-AWARE ADAPTIVE POWER CONTROL SYSTEM AND A METHOD FOR DETERMINING THE CIRCUIT STATE
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HSIEH, Wei-Chih; Hwang, Wei |
Showing items 56-65 of 202 (21 Page(s) Totally)
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