English  |  正體中文  |  简体中文  |  Total items :2851814  
Visitors :  44843915    Online Users :  1308
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"hwang yuan shin"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 1-10 of 32  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2020-06-29T01:21:07Z Trading Conditional Execution for More Registers on ARM Processors. Cheng, Huang-Jia;Hwang, Yuan-Shin;Chang, Rong-Guey;Chen, Cheng-Wei; Cheng, Huang-Jia; Hwang, Yuan-Shin; Chang, Rong-Guey; Chen, Cheng-Wei; CHENG-WEI CHEN
臺大學術典藏 2020-05-04T07:27:44Z Analyzing OpenCL 2.0 workloads using a heterogeneous CPU-GPU simulator. Wang, Li;Tsai, Ren-Wei;Wang, Shao-Chung;Chen, Kun-Chih;Wang, Po-Han;Cheng, Hsiang-Yun;Lee, Yi-Chung;Shu, Sheng-Jie;Yang, Chun-Chieh;Hsu, Min-Yih;Kan, Li-Chen;Lee, Chao-Lin;Yu, Tzu-Chieh;Peng, Rih-Ding;Yang, Chia-Lin;Hwang, Yuan-Shin;Lee, Jenq Kuen;Tsao, Shiao-Li;Ouhyoung, Ming; Wang, Li; Tsai, Ren-Wei; Wang, Shao-Chung; Chen, Kun-Chih; Wang, Po-Han; Cheng, Hsiang-Yun; Lee, Yi-Chung; Shu, Sheng-Jie; Yang, Chun-Chieh; Hsu, Min-Yih; Kan, Li-Chen; Lee, Chao-Lin; Yu, Tzu-Chieh; Peng, Rih-Ding; Yang, Chia-Lin; Hwang, Yuan-Shin; Lee, Jenq Kuen; Tsao, Shiao-Li; Ouhyoung, Ming; CHIA-LIN YANG
國立交通大學 2018-08-21T05:57:06Z Analyzing OpenCL 2.0 Workloads Using a Heterogeneous CPU-GPU Simulator Wang, Li; Tsai, Ren-Wei; Wang, Shao-Chung; Chen, Kun-Chih; Wang, Po-Han; Cheng, Hsiang-Yun; Lee, Yi-Chung; Shu, Sheng-Jie; Yang, Chun-Chieh; Hsu, Min-Yih; Kan, Li-Chen; Lee, Chao-Lin; Yu, Tzu-Chieh; Peng, Rih-Ding; Yang, Chia-Lin; Hwang, Yuan-Shin; Lee, Jenq-Kuen; Tsao, Shiao-Li; Ouhyoung, Ming
國立臺灣科技大學 2010 Trading Conditional Execution for More Registers on ARM Processors Huang-Jia Cheng;Hwang, Yuan-Shin;Rong-Guey Chang;Cheng-Wei Chen
國立臺灣科技大學 2010 DisIRer: Converting a Retargetable Compiler into a Multi-Platform Binary Translator Hwang, Yuan-Shin;Tzong-Yuan Lin;Rong-Guey Chang
國立臺灣科技大學 2010 Set-Associative Load/Store Caches Jia-Jhe Li;Hwang, Yuan-Shin
國立臺灣科技大學 2010 On Reducing Load/Store Latencies of Cache Accesses Hwang, Yuan-Shin;Jia-Jhe Li
國立臺灣科技大學 2009 Indirect-Mapped Caches: Approximating Set-Associativity with Direct-Mapped Caches Jia-Jhe Li;Hwang, Yuan-Shin
國立臺灣科技大學 2008 Compiler-based vs. Hardware-based Power Gating Techniques for Functional Units Yen-Hsiang Fan;Hwang, Yuan-Shin;Yi-Ping You;Jenq-Kuen Lee
國立臺灣科技大學 2007 Snug Set-Associative Caches: Reducing Leakage Power of Instruction and Data Caches with No Performance Penalties Hwang, Yuan-Shin;Jia-Jhe Li

Showing items 1-10 of 32  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page