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Taiwan Academic Institutional Repository >
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"hwu sy chyuan"
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
| 國立臺灣大學 |
2008 |
A Jitter-Tolerance-Enhanced CDR Using a GDCO-Based Phase Detector
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Liang, Che-Fu; Hwu, Sy-Chyuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2007 |
A multi-band burst-mode clock and data recovery circuit
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Liang, Che-Fu; Hwu, Sy-Chyuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2006 |
A 155.52 Mbps–3.125 Gbps Continuous-Rate Clock and Data Recovery Circuit
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Yang, Rong-Jyi; Chao, Kuan-Hua; Hwu, Sy-Chyuan; Liang, Chuan-Kang; Liu, Shen-Iuan |
| 國立臺灣大學 |
2005 |
應用於被動光纖網路之突發式時脈資料回復電路
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胡思全; Hwu, Sy-Chyuan |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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