臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	Repositories
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	2019臺灣學術機構典藏研討會
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Showing items 141-150 of 176 (18 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T04:59:03Z	A Compact Threshold Voltage Model for Gate Misalignment Effect of DG FD SOI NMOS Devices Considering Fringing Electric Field Effects	E. C. Sun; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T04:59:03Z	PD SOI-Technology SPICE Models	J. B. Kuo; S. C. Lin; JAMES-B KUO
臺大學術典藏	2018-09-10T04:59:03Z	A Low-Voltage CMOS Load Driver with the Adiabatic and Bootstrap Techniques for Low-Power System Applications	J. B. Kuo;H. P. Chen; J. B. Kuo; H. P. Chen; JAMES-B KUO
臺大學術典藏	2018-09-10T04:59:03Z	A Low-Voltage CMOS Load Driver with the Adiabatic and Bootstrap Techniques for Low-Power System Applications	J. B. Kuo;H. P. Chen; J. B. Kuo; H. P. Chen; JAMES-B KUO
臺大學術典藏	2018-09-10T04:59:03Z	Trends on CMOS VLSI	J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T04:35:19Z	Compact Modeling of SOI CMOS VLSI Devices	J. .B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T04:35:19Z	Asymmetric Gate Misalignment Effect on Subthreshold Characteristics DG SOI NMOS Devices Considering Fringing Electric Field Effect	M. T. Lin; E. C. Sun; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T04:35:18Z	Ultra-low-voltage SOI CMOS Inverting Driver Circuit Using Effective Charge Pump Based on Bootstrap Technique	JAMES-B KUO; J. B. Kuo; J. H. T. Chen
臺大學術典藏	2018-09-10T04:35:18Z	Modeling the Fringing Electric Field Effect on the Threshold Voltage of FD SOI NMOS Devices with the LDD/Sidewall Oxide Spacer Structure	S. C. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T04:35:18Z	SOI CMOS VLSI	J. B. Kuo; JAMES-B KUO

Showing items 141-150 of 176 (18 Page(s) Totally)
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