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Showing items 71-95 of 176  (8 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2018-09-10T08:18:06Z Charge Pumping Behavior of STI-Isolated PD SOI NMOS Device Operating at Low Temp C. F. Yen;J. B. Kuo; C. F. Yen; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T08:18:05Z Shallow trench isolation-related narrow channel effect on the kink behaviour of 40 nm PD SOI NMOS device H. J. Hung;J. B. kuo;D. Chen;C. T. Tsai;C. S. Yeh; H. J. Hung; J. B. kuo; D. Chen; C. T. Tsai; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T08:18:05Z Shallow trench isolation-related narrow channel effect on the kink behaviour of 40 nm PD SOI NMOS device H. J. Hung;J. B. kuo;D. Chen;C. T. Tsai;C. S. Yeh; H. J. Hung; J. B. kuo; D. Chen; C. T. Tsai; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:38Z Compact Modelign of Nanometer SOI CMOS Devices Considering Shallow Trench Isolation J. B. Kuo; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:38Z Compact Modelign of Nanometer SOI CMOS Devices Considering Shallow Trench Isolation J. B. Kuo; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:38Z Floating-Body-Effect-Related Gate Tunneling Leakage Current Phenomenon of 40nm PD SOI NMOS Device H. J. Hung;J. B. Kuo;C. T. Tsai;D. Chen; H. J. Hung; J. B. Kuo; C. T. Tsai; D. Chen; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:38Z Floating-Body-Effect-Related Gate Tunneling Leakage Current Phenomenon of 40nm PD SOI NMOS Device H. J. Hung;J. B. Kuo;C. T. Tsai;D. Chen; H. J. Hung; J. B. Kuo; C. T. Tsai; D. Chen; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:38Z Low-Voltage CMOS VLSI Circuits J. B. Kuo; J. H. Lou; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Shallow Trench Isolated-Related Narrow Channel Effect on Kink Effect and Breakdown Behavior of 40nm PD SOI NMOS Device J. I. Lu;H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh;C. T. Tsai; J. I. Lu; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Shallow Trench Isolated-Related Narrow Channel Effect on Kink Effect and Breakdown Behavior of 40nm PD SOI NMOS Device J. I. Lu;H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh;C. T. Tsai; J. I. Lu; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Floating-body-effect-related gate tunneling leakage current phenomenon of 40nm PD SOI NMOS device H. J. Hung;J. I. Lu;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. I. Lu; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Floating-body-effect-related gate tunneling leakage current phenomenon of 40nm PD SOI NMOS device H. J. Hung;J. I. Lu;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. I. Lu; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z 0.5V SOI CMOS Dual-Threshold Circuit Technique Via DTMOS for Design Optimization of Low-Power VLSI System Applications W. J. H. Lin;C. Y. Chien;J. B. Kuo; W. J. H. Lin; C. Y. Chien; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z 0.5V SOI CMOS Dual-Threshold Circuit Technique Via DTMOS for Design Optimization of Low-Power VLSI System Applications W. J. H. Lin;C. Y. Chien;J. B. Kuo; W. J. H. Lin; C. Y. Chien; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Design Optimization of Low-Power 90nm CMOS SOC Applications Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS) BP-DTMOS-DT Technique C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Design Optimization of Low-Power 90nm CMOS SOC Applications Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS) BP-DTMOS-DT Technique C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Modeling the Floating-Body-Effect-Induced Drain Current Behavior of PD SOI NMOS Device Via SPICE BJT/MOS Model Approach J. S. Su;J. B. Kuo; J. S. Su; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Modeling the Floating-Body-Effect-Induced Drain Current Behavior of PD SOI NMOS Device Via SPICE BJT/MOS Model Approach J. S. Su;J. B. Kuo; J. S. Su; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:36Z Temperature-Dependent Kink Effect Model for Partially-Depleted SOI NMOS Devices S. C Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:36Z Bandgap Narrowing J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:36Z Closed-Form Partitioned Gate Tunneling Current Model for NMOS Devices with an Ultra-thin Gate Oxide C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:36Z Closed-Form Partitioned Gate Tunneling Current Model for NMOS Devices with an Ultra-thin Gate Oxide C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:36Z Compact MOS/Bipolar Charge-Control Model of Partially-Depleted SOI CMOS Devices for VLSI Circuit Simulation---SOI-Technology (ST)-SPICE J. B. Kuo; K. W. Su; S. C. Lin; JAMES-B KUO

Showing items 71-95 of 176  (8 Page(s) Totally)
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