English  |  正體中文  |  简体中文  |  0  
???header.visitor??? :  50681640    ???header.onlineuser??? :  216
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"j b kuo"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 81-90 of 176  (18 Page(s) Totally)
<< < 4 5 6 7 8 9 10 11 12 13 > >>
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2018-09-10T07:41:37Z Floating-body-effect-related gate tunneling leakage current phenomenon of 40nm PD SOI NMOS device H. J. Hung;J. I. Lu;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. I. Lu; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Floating-body-effect-related gate tunneling leakage current phenomenon of 40nm PD SOI NMOS device H. J. Hung;J. I. Lu;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. I. Lu; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z 0.5V SOI CMOS Dual-Threshold Circuit Technique Via DTMOS for Design Optimization of Low-Power VLSI System Applications W. J. H. Lin;C. Y. Chien;J. B. Kuo; W. J. H. Lin; C. Y. Chien; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z 0.5V SOI CMOS Dual-Threshold Circuit Technique Via DTMOS for Design Optimization of Low-Power VLSI System Applications W. J. H. Lin;C. Y. Chien;J. B. Kuo; W. J. H. Lin; C. Y. Chien; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Design Optimization of Low-Power 90nm CMOS SOC Applications Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS) BP-DTMOS-DT Technique C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Design Optimization of Low-Power 90nm CMOS SOC Applications Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS) BP-DTMOS-DT Technique C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Modeling the Floating-Body-Effect-Induced Drain Current Behavior of PD SOI NMOS Device Via SPICE BJT/MOS Model Approach J. S. Su;J. B. Kuo; J. S. Su; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Modeling the Floating-Body-Effect-Induced Drain Current Behavior of PD SOI NMOS Device Via SPICE BJT/MOS Model Approach J. S. Su;J. B. Kuo; J. S. Su; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO

Showing items 81-90 of 176  (18 Page(s) Totally)
<< < 4 5 6 7 8 9 10 11 12 13 > >>
View [10|25|50] records per page