臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 91-100 of 176 (18 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T07:41:36Z	Temperature-Dependent Kink Effect Model for Partially-Depleted SOI NMOS Devices	S. C Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	Bandgap Narrowing	J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	Closed-Form Partitioned Gate Tunneling Current Model for NMOS Devices with an Ultra-thin Gate Oxide	C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	Closed-Form Partitioned Gate Tunneling Current Model for NMOS Devices with an Ultra-thin Gate Oxide	C. H. Lin;J. B. Kuo; C. H. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	Compact MOS/Bipolar Charge-Control Model of Partially-Depleted SOI CMOS Devices for VLSI Circuit Simulation---SOI-Technology (ST)-SPICE	J. B. Kuo; K. W. Su; S. C. Lin; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	A Novel 0.7V Two-Port 6T SRAM Memory Cell Structure with Single-Bit-Line Simultaneous Read-and-Write Access (SBLSRWA) Capability using Partially Depleted SOI Dynamic-Threshold Technique	S. C. Liu; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:36Z	Semiconductor R&D in Taiwan	J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:35Z	A CMOS Semi-Static Latch Circuit without Charge Sharing and Leakage Current Problems	P. F. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:35Z	A Low-Voltage Semi-Dynamic DCVSPG-Domino Logic Circuit	J. H. Lou; J. B. Kuo; JAMES-B KUO
臺大學術典藏	2018-09-10T07:41:35Z	Modeling of Deep-Submicron SOI CMOS VLSI Devices	J. B. Kuo; JAMES-B KUO

Showing items 91-100 of 176 (18 Page(s) Totally)
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